Mitsubishi Electric MELSEC-L Series LD40PD01 User Manual page 123

Flexible high-speed i/o control module
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Receive data monitor
Out of the data frame received from the SSI encoder, the information for the number of bits specified with "Data Frame
Length" is stored in the following buffer memory areas. (The parity bit is not included.)
Buffer memory address
Un\G110, Un\G111
Un\G114, Un\G115
Some SSI encoders output not only position data (multi turn data, single turn data) but also status data in the data frame. The
status of encoder can be checked by reading out values of above buffer memory areas with a program.
In addition, when a count value is not refreshed properly, its cause (whether it is a receive data error or a parameter setting
error) can be identified by checking multi turn data and single turn data contained in the receive data monitor.
Ex.
The example shows the receive data monitor of when the SSI encoder with the data frame of the following configuration is
used.
• Data frame length: 28 bits
• Multi turn data: 14 bits
• Single turn data: 13 bits
• Status: 1 bit
• Parity bit: 1 bit
Receive frame from SSI encoder
b31
SSI receive data monitor 0
0 (fixed)
(Un/G110, Un/G111)
Signal error detection
An error of the external wiring to the SSI encoder can be detected.
When "Signal Error Detection" is set to "Enable", a signal error detection processing is performed. If an error occurs on the
external wiring to the SSI encoder, the SSI encoder block  DATA signal wire reverse error (error code: 109H) or the SSI
encoder block  DATA signal error (error code: 10AH) is output.
In addition, in the cycle where data is received from the SSI encoder with an error detected, the count value of the multi
function counter block linked to the SSI encoder block is not refreshed.
Data frame length: 28 bits
Multi turn
14 bits
b28 b27
Multi turn
14 bits
SSI encoder block
SSI_Encoder_0
SSI_Encoder_1
Single turn
Status
Parity
1 bit
1 bit
13 bits
b0
Single turn
Status
13 bits
1 bit
9 CREATING A HARDWARE LOGIC
9.1 Main Blocks in the Hardware Logic Outline Window
This is not reflected in
SSI receive data monitor.
9
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