Mitsubishi Electric MELSEC-L Series LD40PD01 User Manual page 121

■Single turn
The following example is for the receive frame of a single turn encoder. The receive frame consists of the elements below.
• Single turn: 24 bits
• Status bit: 1 bit
• Parity bit: None
Clock
Most
significant bit
Receive frame
bit position
0 1 2 3 4
DATA
Single turn start bit position
S23 S22 S21 S20 S19
• Parameter
*1
Encoder specifications
Encoder type Single turn
Transmission speed 2MHz
Monoflop time 10μs
 
 
*1 For details on the encoder specifications, refer to the manual for the encoder used.
• Parameters of "Data Frame Setting"
*2
Encoder specifications
Data type Pure binary
Data frame length 27 bits

Multi turn data length
Multi turn data start bit 
position
Encoder resolution 16777216
Single turn data length 24 bits
Single turn data start bit 0
position
Parity check 
*2 For details on the encoder specifications, refer to the manual for the encoder used.
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Single turn: 24 bits
Data frame length: 27 bits
SSI encoder block setting
Item
Encoder Type
Transmission Speed
Monoflop Time
Signal Error Detection
Direction
SSI encoder block setting
Item
Input Data Type
Data Frame Length
Multi Turn Data Length
Multi Turn Start Bit
Encoder Resolution
Single Turn Data Length
Single Turn Start Bit
Parity
0 0 S
Remarks
Setting value

Single Turn

2.0MHz

10
Disable Set "Enable" to use the signal error detection.
Set "Disable" not to use it.
Reverse Set "Forward" to count a position data from the
SSI encoder in the forward direction. Set
"Reverse" to reverse the counting direction.
Remarks
Setting value

Pure binary

27
0 Setting is not required.
0 Setting is not required.
0 Changing the setting value from the initial value
(0) is not required because the single turn data
length is 24 bits and the encoder resolution is
16777216 (= 2
24 
0 Specify the receive frame bit position where
single turn data starts.
None 
9 CREATING A HARDWARE LOGIC
9.1 Main Blocks in the Hardware Logic Outline Window
Least significant bit
Status bit: 1 bit
24
).
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