Mitsubishi Q00JCPU User Manual page 661

APPENDICES
Special
ACPU Special
Register
Special Register for
after
Conversion Modification
Conversion
D9125 SD1125 SD64
D9126 SD1126 SD65
D9127 SD1127 SD66
D9128 SD1128 SD67
D9129 SD1129 SD68
D9130 SD1130 SD69
D9131 SD1131 SD70
D9132 SD1132 SD71
TableApp.28 Special register
Name Meaning
Annunciator
Annunciator
detection
detection number
number
Details
• When any of F0 to 2047 is turned on by
numbers (F numbers) that are turned on in order are registered into
D9125 to D9132.
RST F
• The F number turned off by is erased from any of D9125
to D9132, and the F numbers stored after the erased F number are
shifted to the preceding registerers.
By executing LEDR instruction, the contents of SD64 to SD71
are shifted upward by one. (For A3N, A3HCPU, it can be
performed by use of INDICATOR RESET switch on front of CPU
module.)
When there are 8 annunciator detections, the 9th one is not stored
into SD64 to SD71 even if detected.
SET SET SET RST SET SET SET SET
F50 F25 F99 F25 F15 F70 F65 F38
0 50 50 50 50 50 50 50 50 50 50 50 99
SD62
0 1 2 3 2 3 4 5
SD63
0 50 50 50 50 50 50 50 50 50 50 50 99
SD64
0 0 25 25 99 99 99 99 99 99 99 99 15
SD65
0 0 0 99 0 15 15 15 15 15 15 15 70
SD66
0 0 0 0 0 0 70 70 70 70 70 70 65
SD67
0 0 0 0 0 0 0 65 65 65 65 65 38
SD68
0 0 0 0 0 0 0
SD69 0
0 0 0 0 0 0 0 0
SD70
0 0 0 0 0 0 0
SD71 0
Appendix 2 Special Register List
Corresponding CPU
SET F
, the annunciator
SET SET SET
F110 F151 F210 LEDR
QnA
Qn(H)
QnPH
6 7 8 8 8
38 38 38 38 110
0 110 110 110 151
151 151 210
0 0
App
9
10
11
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