Mitsubishi Q00JCPU User Manual page 603

Q series, logic
Hide thumbs Also See for Q00JCPU:
Table of Contents

Advertisement

APPENDICES
Number
Name
SM420
User timing clock No.0
SM421
User timing clock No.1
SM422
User timing clock No.2
SM423
User timing clock No.3
n2 scan
SM424
User timing clock No.4
SM430
User timing clock No.5
SM431
User timing clock No.6
SM432
User timing clock No.7
SM433
User timing clock No.8
SM434
User timing clock No.9
(4) Scan information
Number
Name
OFF : Completed or not
Low speed program
SM510
execution flag
ON : Execution under way.
Reads module service
OFF : Ignored
SM551
interval
ON : Read
(5) I/O refresh
Number
Name
Program to program I/
OFF : Not refreshed
SM580
O refresh
ON : Refreshed
*1: This applies to the CPU of function version B or later.
TableApp.4 Special relay
Meaning
• Relay repeats ON/OFF switching at fixed scan
intervals.
• When PLC power supply is turned OFF or a CPU
module reset is performed, goes from OFF to start.
(For the redundant CPU, however, this relay is
always OFF after system switching.)
• The ON/OFF intervals are set with the DUTY
instruction
n2 scan
n1: ON scan interval
n1 scan
n2: OFF scan interval
• For use with SM420 to SM424 low speed programs
TableApp.5 Special relay
Meaning
• Goes ON when low speed execution type program is
executed
executed.
• When this relay goes from OFF to ON, the module
service interval designated by SD550 is read to
SD551 to SD552.
TableApp.6 Special relay
Meaning
• When this special relay is turned ON, I/O refresh is
performed after execution of the first program, and
the next program is then executed.
When a sequence program and an SFC program are
to be executed, the sequence program is executed,
I/O refresh is performed, and the SFC program is
then executed.
Explanation
(When Set)
S (Every END
processing)
DUTY
n1
n2
SM420
S (Every END
processing)
Explanation
(When Set)
S (Every END
processing)
Explanation
(When Set)
Appendix 1 Special Relay List
Corres-
ponding
Set by
Corresponding CPU
ACPU
M9
M9020
M9021
M9022
M9023
M9024
QnA
New
Qn(H)
QnPH
Corres-
ponding
Set by
Corresponding CPU
ACPU
M9
QnA
New
Qn(H)
QnPH
QnA
Qn(H)
U
New
QnPH
QnPRH
Rem
Corres-
ponding
Set by
Corresponding CPU
ACPU
M9
U
New
Q00J/Q00/Q01
App
9
10
11
*1
- 8

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents