Status Byte And Service Request - Keithley 2182 User Manual

Status byte and service request (SRQ)
Service request is controlled by two 8-bit registers: the Status Byte Register and the Service
Request Enable Register.
Figure 11-9

Status byte and service request

Service
* STB?
Request
Generation
Serial Poll
OR
* SRE
* SRE?
Status byte register
The summary messages from the status registers and queues are used to set or clear the
appropriate bits (B0, B2, B3, B4, B5, and B7) of the Status Byte Register. These bits do not latch,
and their states (0 or 1) are solely dependent on the summary messages (0 or 1). For example, if
the Standard Event Status Register is read, its register will clear. As a result, its summary
message will reset to 0, which in turn will clear the ESB bit in the Status Byte Register.
Bit B6 in the Status Byte Register is one of the following:
• The Master Summary Status (MSS) bit, sent in response to the *STB? command,
indicates the status of any set bits with corresponding enable bits set.
• The Request for Service (RQS) bit, sent in response to a serial poll, indicates which
device was requesting service by polling on the SRQ line.
For a description of the other bits in the Status Byte Register, see
Commands."
Figure 11-9 shows the structure of these registers.
Status Summary Messages
RQS
OSB ESB MAV QSB
(B6)
(B7) (B5) (B4) (B3)
MSS
&
&
&
OSB ESB MAV QSB
(B7) (B6) (B5) (B4) (B3)
OSB = Operation Summary Bit
MSS = Master Summary Status
RQS = Request for Service
ESB = Event Summary Bit
MAV = Message Available
QSB = Questionable Summary Bit
EAV = Error Available
MSB = Measurement Summary Bit
Remote Operation
Read by Serial Poll
EAV Status Byte
MSB
(B2) (B1) (B0)
Register
Read by *STB?
&
&
&
EAV MSB
Service
(B2) (B1) (B0)
Request
Enable
Register
& = Logical AND
OR = Logical OR
Section 12,
11-19
"Common