Major Component (Ics) Definitions; Table 2-1. Major Component Descriptions And Functions - ADLINK Technology CoreModule 920 Reference Manual

Chapter 2

Major Component (ICs) Definitions

Table 2-1 lists the major ICs, including a brief description of each, on the CoreModule 920.
2-4 show the locations of the major ICs.

Table 2-1. Major Component Descriptions and Functions

Chip Type
CPU (U1)
DDR3 SDRAM
(U3, U5, U8, U10,
U11 [to enable
ECC])
DDR3 SDRAM
(U4, U6, U7, U9 - on
bottom side [see
Figure 2-4])
PCH [Platform
Controller Hub
(U12)]
Gigabit Ethernet
PHY Transceiver
(U14)
Gigabit Ethernet
Controller (U15)
Ethernet EEPROM
(U16)
PCIe-to-PCI Bridge
(U17)
LPC-to-UART
Controller (U18)
CoreModule 920
Mfg. Model
Intel Core i7, 3517UE,
1.7GHz (17W)
Hynix H5TQ2G83BFR-H9
Hynix H5TQ2G83BFR-H9
Intel BD82QM67
(PCH)
Intel 82579LM
Intel 82574IT
Atmel AT25128B-SSHL-B
Texas XIO2001IPNP
Instruments
Fintek F81216AU-I
Reference Manual
Product Overview
Figures 2-3
Description Function
Central Processing Integrates
Unit with 2 Processor Core
execution cores and and Graphics
up to 8MB L3 cache Memory
Controller Hub
On-board DDR3 Provides high-
256M x 8 System speed data
Memory transfer
On-board DDR3 Provides high-
256M x 8 System speed data
Memory transfer
I/O Hub for Provides
common user Southbridge
interfaces interfaces and
off loads some
Northbridge
functions from
the CPU
Single-port Gigabit Provides a
Ethernet PHY standard IEEE
Transceiver for 802.3 Ethernet
GLAN1 interface interface for
Ethernet transfer
rates up to 1000
Mb/s
Gigabit Ethernet Generates PCIe
controller for 10T/100TX/
GLAN2 interface 1000T Ethernet
signals
Three-Wire Serial Provides storage
EEPROM for for MAC
Gigabit Ethernet addresses, serial
Controller numbers, and
pre-boot
configuration
data
PCIe-to-PCI Migrates legacy
interface PCI interfaces
Serial Provides 4
communication UART ports
controller through the LPC
bus
and
11