Table 3-10. Vga Interface Pin Signal Descriptions (J17) - ADLINK Technology CoreModule 920 Reference Manual

Chapter 3
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Supports DVD-Audio and Audio Return channel
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Provides one 19-pin, standard HDMI micro connector
PEG (PCI Express Graphics):
•
Supports external high-performance PCI Express graphics cards
•
Supports general-purpose PCI Express devices
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Supports theoretical bandwidth of up to 8GT/s
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Provides PCIe Gen3 compliance
Table 3-10 defines the signals of the VGA interface, which consists of 10 pins, 2 rows, odd/even, (1, 2) with
0.079" (2mm) pitch.

Table 3-10. VGA Interface Pin Signal Descriptions (J17)

Pin # Signal
1 VSYNC
2 HSYNC
3 DDC-CLK
4 RED
5 DDC-DATA
6 GREEN
7 VDD5V0
8 BLUE
9 GND
10 GND
Note: The shaded table cells denote power or ground.
Table 3-11 lists the pin signals of the LVDS video header, which provides 20 pins, 2 rows, odd/even pin
sequence (1, 2) with 0.079" (2mm) pitch.
Table 3-11. LVDS Video Interface Pin Signals (J23)
Pin # Signal
1 +12V
2 VCC_LVDS_CONN
3 GND
4 GND
5 LVDSA_CLK_P
6 LVDSA_CLK_N
7 LVDSA_DAT3_P
8 LVDSA_DAT3_N
9 LVDSA_DAT2_P
10 LVDSA_DAT2_N
11 LVDSA_DAT1_P
12 LVDSA_DAT1_N
30
Description
Vertical Sync – This signal is used for the digital vertical sync (polarity is
programmable) 2.5V output to the VGA display.
Horizontal Sync – This signal is used for the digital horizontal sync
(polarity is programmable) or "sync interval" 2.5V output to the VGA
display
Display Control Clock
Red – This is the Red analog output signal to the VGA display.
Display Control Data
Green – This is the Green analog output signal to the VGA display.
Power – This is the +5 volts +/- 5% power signal from the external power
interface.
Blue – This is the Blue analog output signal to the VGA display.
Ground
Ground
Description
+12 volts for flat panel and backlight
JP3 determines LVDS voltage (+3.3V or +5V)
Ground
Ground
LVDS A Clock Positive
LVDS A Clock Negative
LVDS A DATA Positive Line 3
LVDS A DATA Negative Line 3
LVDS A DATA Positive Line 2
LVDS A DATA Negative Line 2
LVDS A DATA Positive Line 1
LVDS A DATA Negative Line 1
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CoreModule 920