Table of Contents
Advertisement
9.10 Test Port (JTAG)
V
= 5 V ± 0.5V
CC
Description
TCK period
TCK width high
TCK width low
TMS, TDI setup before TCK high
TMS, TDI hold after TCK high
TDO delay after TCK low
TRST* pulse width
SMCS Inputs setup before TCK high
SMCS Inputs hold after TCK high
SMCS Outputs delay after TCK low
V
= 3.3 V ± 0.3V
CC
Description
TCK period
TCK width high
TCK width low
TMS, TDI setup before TCK high
TMS, TDI hold after TCK high
TDO delay after TCK low
SMCS332SpW
User Manual
– All Rights Reserved – Copyright per DIN 34 –
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue:
1.4
Updated: 9-Sep-2006
Page:
82 of 131
Symbol
Min.
Max.
t
100
TCK
t
40
TCKH
t
40
TCKL
t
8
TIS
t
8
TIH
t
17
TDO
t
2 * t
TRST
TCK
t
8
SYSS
t
8
SYSM
t
27
SYSO
Symbol
Min.
Max.
t
100
TCK
t
40
TCKH
t
40
TCKL
t
8
TIS
t
8
TIH
t
20
TDO
Uni
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Uni
t
ns
ns
ns
ns
ns
ns
Advertisement
Table of Contents
