Wormhole Routing On Smcs332Spw; Routing Implementation On Smcs332Spw - Eads Astrium SMCS332SpW User Manual

Interface between three spacewire links
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hole that closes again behind its tail. Wormhole routing is invisible as far as the senders and receivers of packets are
concerned, its only effect is to minimize the latency in message transmission.
The SMCS332SpW interprets the signals on its inputs as sequences of packets. It takes the first byte of data as the header of
the packet, which determines what it will do with the whole packet. The length and contents of the remainder of the packet
are arbitrary. The end of the packet is indicated by one of two distinguished termination characters, called EOP and EEP.
The routing decision is taken as soon as the header of the packet has been input. If the output link is free, the packet (without
header) is sent directly from input to output without being stored. If the output link is not free then the packet is buffered. To
exploit the full bandwidth of the internal pathways on the SMCS332SpW, there is buffering on each path through the device.
The buffering is fully hand shaken, FIFO buffering with minimal latency.
Note that if a packet is transmitted from a link running at a higher speed than the link on which it is received, there will be a
loss of efficiency because the higher speed link will have to wait for data from the slower link. In most cases all the links in a
network should be run at the same speed.
5.5.2

Wormhole routing on SMCS332SpW

The SMCS332SpW supports wormhole routing if in ROUTE_CTRL register D7 is set (bit7 = 1) and when operating in
transparent mode. Wormhole routing could only be enabled for the whole SMCS332SpW not for dedicated channels only.
The figure below shows the routing possibilities inside the SMCS332SpW. An incoming packet can be routed to the
channelx receive fifo or to one of the two other links. The routing connection is terminated by the EOP or EEP of the routed
packet.
5.5.3

Routing Implementation on SMCS332SpW

When routing is enabled, the first byte of a received packet will be interpreted as the address destination byte (or routing
header). The address byte will be removed from the packet (header deletion). The remaining packet is unchanged.
The address byte is compared with the contents of the CHx_ADDR and the contents of the register CHx_RT_ADDR of the
two other channels. If the address byte matches with one of the three register contents, the packet will automatically
forwarded to this link or the internal receive FIFO.
If the address byte does not match with the contents of one of the three registers the packet is forwarded to the internal
receive FIFO and an error interrupt (if enabled) will be raised.
The figure below shows the address comparator. In the figure a packet comes in on channel 2. The leading byte (address
byte) is compared with the contents of register CH2_ADDR, CH1_RT_ADDR, CH3_RT_ADDR and removed from the
packet. If the address byte matches with the contents of one of the register the packet is routed along this channel.
If the address byte does not match at all the packet is routed to channel receive fifo and an interrupt is raised.
SMCS332SpW
User Manual
route address
1. byte
– All Rights Reserved – Copyright per DIN 34 –
packet body (0 or more byte)
2. - n. byte
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue:
1.4
Updated: 9-Sep-2006
Page:
50 of 131
EOP

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