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4.2.2.8
Channel 1 Control Register 1 (CH1_CNTRL1)
- address:
- data width:
- access mode:
- reset value:
Bit
Description
1:0
data transfer mode of channel 1
00:
transparent mode (reset), this mode allows complete transparent data transfer between two nodes.
01:
reserved
10:
simple interprocessor communication protocol mode (known as protocol mode), this mode
executes the simple interprocessor communication protocol as described in the protocol
specification.
11:
reserved
2
only when protocol mode enabled:
check destination byte enabled
compare first byte (header: destination address byte) of the received data packet with register CH1_ADDR
3
only when protocol mode enabled:
send acknowledge packet enabled
when set, the protocol unit sends acknowledge packets
see also bit 2 and 3 of register CH1_PR_STAR
4
checksum enabled
when set, the channel sends two checksum bytes at the end of the transmitted packet and checks the last two
bytes. See Note.
5
header field control bit
when set, the SMCS332SpW use the first byte of a packet as number of bytes which are transmitted as
header bytes. If checksum enabled, this bytes are excluded from the checksum.
The range for the header field is from minimum 2bytes (number byte + header byte) to maximum16 bytes.
The size of the header field is 4, 8, 12 and 16 bytes. This means, that the data field starts at the next modulo
4 bytes. The rest of a 4-byte block which is not covered by the number of header bytes will not be
transmitted.
See for additional information chapter 5.6.
7:6
always '0' / reserved
Note: The Checksum generation and check module adds all bytes in the packet:
checksum[16:0] = checksum[16:0] + data[7:0] + checksum[16]
The checksum is generated in the SMCS332SpW as shown in the following figure.
SMCS332SpW
User Manual
0x18
6 bit, D5:0
read / write
0x00
– All Rights Reserved – Copyright per DIN 34 –
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue:
1.4
Updated: 9-Sep-2006
Page:
33 of 131
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