Differences Between The Smcs332Spw And The Old Smcs332; Summary Of Changed/Modified/Added Registers Or Register Bits - Eads Astrium SMCS332SpW User Manual

14 Differences between the SMCS332SpW and the old SMCS332

Summary of changed/modified/added registers or register bits

14.1
Address Register
0x04 Interrupt
register ISR
0x05
0x06
0x07
0x08 Interrupt mask register
0x09
0x0A
0x0B
0x10 CHx_DSM_MODR
0x30
0x50
0x12 CHx_DSM_STAR
0x32
0x52
0x13 CHx_DSM_TSTR
0x33
0x53
0x18 CHx_CNTRL1
0x38
0x58
0x1F CHx_COMICFG
0x3F
0x5F
SMCS332SpW
User Manual
Description SMCS332
status ISR Byte0 D0:
channel 1: IEEE1355 parity or
disconnect error
ISR Byte1 D2:
channel 2: IEEE1355 parity or
disconnect error
ISR Byte2 D4:
channel 3: IEEE1355 parity or
disconnect error
ISR Byte3 D6:
always '0' / reserved
IMR Byte3 D6:
always '0' / reserved
D5 power save mode bit
D5 always '0' / reserved
D6 always '0' / reserved
D4 always '0' / reserved
D5 always '0' / reserved
D5 always '0' / reserved
D2 '0' = send EOP1 token at
the end of the packet
'1' = send EOP2 token at
the end of the packet
D3 always '0' / reserved
– All Rights Reserved – Copyright per DIN 34 –
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue: 1.4
Updated: 9-Sep-2006
Page: 130 of 131
Description SMCS332SpW
ISR Byte0 D0:
channel 1: SpaceWire parity,
disconnect, ESC or credit error
ISR Byte1 D2:
channel 2: SpaceWire parity,
disconnect, ESC or credit error
ISR Byte2 D4:
channel 3: SpaceWire parity,
disconnect, ESC or credit error
ISR Byte3 D6:
TICK IN received interrupt
IMR Byte3 D6:
mask bit for TICK IN received
interrupt
D5 always '0' / reserved
D5 ESC error
D6 FCT error
Attention: Only D4 shall be checked
whether the link is in the "Run" state
or not.
D4 link output mute
D5 send EEP instead of EOP
D5 header field control bit
D2 '0' = send EOP token at
the end of the packet
if D3 = '0'
'1' = send EOP token at
the end of the packet
if D3 = '0'
D3 '0' = send EOP token at