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6 Programming and Operation Modes
This section contains the descriptions how to operate the SMCS332SpW from the programmers point of view, together with
some code examples.
6.1
SMCS332SpW Initialization
After power-up or any other reset the configuration registers of the SMCS332SpW are set to their default values (see chapter
register description). For proper operation, each application has to adapt them according to their specific needs.
The following list shows registers that are important for the SMCS332SpW initialization. It represents a configuration
guideline for the configuration subsystem. Each register description is accompanied by an exemplary value.
6.1.1
SMCS332SpW Interface Control Register
This register determines the HOCI data bus width and the COMI data bus endian mode. This register should be the first to
be configured, to ensure proper SMCS332SpW operation. Setting the HOCI port to 32 bit all internal registers are
accessible with one read or write operation (in 8 bit mode each byte of a 16 or 32 bit register must be accessed separately).
6.1.2
Transmit Bitrate Register (TRS_CTRL)
This allows configuration of the maximum transmit bit rates between 80 and 200MBit/s (see also Channel specific mode
register). The reset value of the register (0x0A) results in a transmit bitrate of 100 MBit/s.
The Transmit bitrate register can be configured between 80 and 200 MBit/s in 20 MBit steps as follows:
Register Value
6.1.3
SMCS332SpW Interrupt Status Register (ISR)
This register contains all interrupt status information. It should be read out initially after reset to clear all illegal latched
interrupts.
SMCS332SpW
User Manual
Max.Transmit Bitrate (MBit/s)
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
– All Rights Reserved – Copyright per DIN 34 –
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue:
Updated: 9-Sep-2006
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