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COMI_ACR values from
0x00 = disable communication memory interface
0x01 = is not allowed
to 0x0F = max. CLK cycles between two accesses.
See also the description for pins CAM, COCI, COCO and chapter 5.3 COMI arbitration.
4.2.1.8
PRCI Register (PRCIR)
- address:
- data width:
- access mode:
- reset value:
Gives the status of the protocol command interface signals CPUR* and SES0 - 3*.
Bit
Description
0
Status of signal CPUR*
0 = Signal CPUR* is inactive high
1 = Signal CPUR* is active low
1
status of signal SES0*
0 = Signal SES0* is inactive high
1 = Signal SES0* is active low
2
status of signal SES1*
0 = Signal SES1* is inactive high
1 = Signal SES1* is active low
3
status of signal SES2*
0 = Signal SES2* is inactive high
1 = Signal SES2* is active low
4
status of signal SES3*
0 = Signal SES3* is inactive high
1 = Signal SES3* is active low
7:5
always '0' / reserved
See also the Simple Interprocessor Communication Protocol Specification chapter 13
SMCS332SpW
User Manual
0x0F
5 bit, D4:0
read / write
0x00
– All Rights Reserved – Copyright per DIN 34 –
EADS Astrium GmbH, ASE2
Doc No: SMCS_ASTD_UM_100
Issue:
1.4
Updated: 9-Sep-2006
Page:
28 of 131
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