Samsung S5PC100 User Manual page 1708

S5PC100 USER'S MANUAL (REV1.0)
PCM_n_CTL Bit
TX_MSB
_POS
RX_MSB
_POS
PCM_TXFIFO
_EN
PCM_RXFIFO
_EN
PCM_PCM
_ENABLE
[4] Controls the position of the MSB bit in the serial output stream
relative to the PCMSYNC signal
0: MSB sent during the same clock that PCMSYNC is high
1: MSB sent on the next PCMSCLK cycle after PCMSYNC is high
[3] Controls the position of the MSB bit in the serial input stream
relative to the PCMSYNC signal
0: MSB is captured on the falling edge of PCMSCLK during the
same cycle that PCMSYNC is high
1: MSB is captured on the falling edge of PCMSCLK during the
cycle after the PCMSYNC is high
[2] Enable the TXFIFO
If the enable is LOW the internal FIFOs clears and reinitialize
[1] Enable the RXFIFO
If the enable is LOW the internal FIFOs clears and reinitialize
[0] PCM enable signal. Enables the serial shift state machines.
The enable must be set HIGH for the PCM to operate.
If the enable is LOW, the PCM outputs will not toggle (PCMSCLK,
PCMSYNC, and PCMSOUT). Additionally if the enable is LOW,
the internal divider-counters are held in reset.
Description
PCM AUDIO INTERFACE
Reset Value
0
0
0
0
0
10.5-7