X0002 - Samsung S5PC100 User Manual

S5PC100 USER'S MANUAL (REV1.0)
5 REGISTER DESCRIPTION
5.1 REGISTER OVERVIEW
Register
AC_GLBCTRL
AC_GLBSTAT
AC_CODEC_CMD
AC_CODEC_STAT 0xF230_000C
AC_PCMADDR
AC_MICADDR
AC_PCMDATA
AC_MICDATA
5.2 DETAILED DESCRIPTION
5.2.1 AC97 Global Control Register (AC_GLBCTRL, R/W, Address = 0xF230_0000)
This is the global register of the AC97 controller. There are interrupt control registers, DMA control registers, AC-
Link control register, data transmission control register and related reset control register.
AC_GLBCTRL
Reserved
Codec ready interrupt clear
PCM out channel underrun
interrupt clear
PCM in channel overrun
interrupt clear
Mic in channel overrun
interrupt clear
PCM out channel threshold
interrupt clear
PCM in channel threshold
interrupt clear
MIC in channel threshold
interrupt clear
Reserved
Codec ready interrupt enable
PCM out channel underrun
interrupt enable
PCM in channel overrun
interrupt enable
Address R/W
0xF230_0000 R/W
0xF230_0004 R
0xF230_0008 R/W
R
0xF230_0010 R
0xF230_0014 R
0xF230_0018 R/W
0xF230_001C R/W
Bit
[31] Reserved
[30] 1 = Interrupt clear (write only)
[29]
1 = Interrupt clear (write only)
[28]
1 = Interrupt clear (write only)
[27]
1 = Interrupt clear (write only)
[26]
1 = Interrupt clear (write only)
[25]
1 = Interrupt clear (write only)
[24]
1 = Interrupt clear (write only)
[23] Reserved
[22] 0 = Disables
[21] 0 = Disables
1 = Enables ( FIFO is empty)
[20] 0 = Disables
1 = Enables ( FIFO is full)
Description
AC97 Global Control Register
AC97 Global Status Register
AC97 Codec Command Register
AC97 Codec Status Register
AC97 PCM Out/In Channel FIFO Address Register 0x00000000
AC97 Mic In Channel FIFO Address Register
AC97 PCM Out/In Channel FIFO Data Register
AC97 MIC In Channel FIFO Data Register
Description
AC97 CONTROLLER
Reset Value
0x00000000
0x00000001
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset Value
1 = Enables
0
0
0
0
0
0
0
0
0
0
0
0
10.4-13