Frequency Synthesizer; Frequency Control Loop; Rf Pll; Operation Of Control Loop - Tait TM9100 Service Manual

2.6.2

Frequency Synthesizer

As shown in
Introduction
parts:
The FCL consists of the following:
Frequency Control
Loop
The FCL provides the reference frequency for the RF PLL. The FCL
generates a high-stability reference frequency that can be both modulated
and offset in fine resolution steps.

RF PLL

The RF PLL has fast-locking capability but coarse frequency resolution.
This combination of control loops creates improved frequency generation
and acquisition capabilities.
Note that patents are pending for several aspects of the synthesizer design.
The RF PLL is a conventional integer-N-type design with frequency
Operation of
Control Loop
resolution of 25kHz. In transmit mode, the loop locks to the transmit
frequency, whereas in receive mode, it locks to the receive frequency minus
the first IF frequency.
Initially, the VCO generates an unregulated frequency in the required range.
This is fed to the PLL device (ADF4111) and divided down by a
programmed ratio to approximately 25kHz. The reference frequency input
from the FCL is also divided down to approximately 25kHz. The phase of
the two signals is compared and the error translated into a DC voltage by a
programmable charge pump and dual-bandwidth loop filter. This DC signal
is used to control the VCO frequency and reduce the initial error. The loop
eventually settles to a point that minimizes the phase error between divided
down reference and VCO frequencies. The net result is that the loop
"locks" to a programmed multiple of the reference frequency.
TM9100 Service Manual
© Tait Electronics Limited August 2005
Figure 2.12, the frequency synthesizer consists of two main
FCL
RF PLL, comprising RF PLL device, loop filter, VCO, and VCO output
switch
TCXO
mixer
loop filter
VCXO
frequency control block
The RF PLL consists of the following:
RF PLL device
loop filter
VCO
VCO output switch
Description 57