Software Start-Up - Tait TM9100 Service Manual

Figure 2.11 Software architecture
Serial Flash
Flash Memory
RISC Proc.
FPGA Image
FPGA
Dynamic
Memory
When the radio is turned on, the following processes are carried out on the

Software Start-Up

main board:
Note
1.
2.
3.
TM9100 Service Manual
© Tait Electronics Limited August 2005
FPGA
FPGA Image
RISC Processor
Boot Code
Radio Application
Code
Custom Logic
Additional Digital
Signal Processing
This process describes the normal software start-up into normal
radio operation mode.
The FPGA image, which includes the RISC processor and the cus-
tom logic, is loaded from the serial flash to the FPGA.
The RISC processor executes the boot code, which carries out an
initialization and auto-calibration, and—in case of a fault—generates
an error code for display on the control head.
Normal radio operation starts with:
the RISC processor executing the radio application code,
including application software for the analog and/or digital modes
the DSP executing the DSP code for processing of digital signals
in analog and digital mode
the custom logic executing additional digital signal processing
Serial Flash
FPGA Image
Flash Memory
Boot Code
Radio Application Code
Database
DSP Code
DSP
DSP Code
SRAM
Dynamic Memory
Description 45