A.4.1.2 Limit (L)—Bit 6; A.4.1.3 Extension In Use (E)—Bit 5 - Motorola DSP56800 Manual

A.4.1.2 Limit (L)—Bit 6
The L bit is set to indicate that one of two conditions has occurred: an overflow has occurred in a data ALU
operation (see Section A.4.1.7, "Overflow (V)—Bit 1," on page A-10), or limiting has occurred when
moving one of the two accumulators (A or B) with a move or parallel move instruction. L is not affected
otherwise.
The L bit is latched once it is set; it is cleared only by a processor reset or an instruction that explicitly
clears it. The complete formula for calculating L is the following:
L = L | V | (limiting due to a move)
L is not affected by the OMR's CC or SA bits. Note, however, that the V bit is affected by both the CC and
SA bits. As a result, the L bit can be indirectly affected by these two control bits.
The TFR instructions performs a register-to-register transfer and is not
considered a "move" instruction in terms of the preceding discussion. The
L bit will therefore not be set due to the register-to-register move, even if
SA is set and saturation occurs. The TFR instruction can set the L bit if it
has a parallel move and if limiting occurs in that parallel move.
A.4.1.3 Extension in Use (E)—Bit 5
The E bit is updated based on the result of a data ALU operation to indicate whether the MSP and LSP of
the result contain all of the significant bits, or if the extension bits are needed to express the result. If the E
bit is clear, the MSP and LSP contain all the significant bits—the high-order bits represent only sign
extension.
Based on the size of the result or destination, the E bit is calculated as follows:
For 20- and 36-bit results or destinations:
E is cleared if the upper 5 bits of the result are 00000 or 11111. E is set otherwise.
For 16-bit results or destinations:
If one of the operands is located in X0, Y0, or Y1, or comes from memory, the value is first sign
extended. Sign extension is also performed when the source operand is located in an accumulator.
If one of the operands is 5-bit immediate data, that value is first zero extended. A 20-bit arithmetic
operation is then performed, where the result is located in the lowest 16 bits. E is cleared if all of
the upper 5 bits of the 20-bit result are 00000 or 11111, and is set otherwise.
For 32-bit results or destinations:
If one of the operands comes from memory or the Y register, or is 16-bit immediate data, it is first
sign extended. Sign extension is also performed when the source operand is located in an
accumulator. If one of the operands is 5-bit immediate data, it is first zero extended. A 36-bit
arithmetic operation is then performed, where the long result is located in the lowest 32 bits. E is
cleared if all of the upper 5 bits of the result are 00000 or 11111 and is set otherwise.
E is not affected by the OMR's CC bit.
A-8
NOTE:
DSP56800 Family Manual