Table A-20 Memory Access Timing Summary - Motorola DSP56800 Manual

Access X Memory
Type Access
X: Int
X: Ext
P: —
P: —
IO: —
X:X: Int:Ext
X:X: Ext:Int
X:X: I/O:Int
1. wx—external X memory access wait states
2. wp—external P memory access wait states
Three examples using the preceding tables follow.
Example A-1. Arithmetic Instruction with Two Parallel Reads
Problem
Calculate the number of DSP56800 instruction program words and the number of oscillator clock cycles
required for the following instruction:
MACR X0,Y0,A
Where the following conditions are true:
• Operating mode register (OMR) = $02 (normal expanded memory map).
• External X memory accesses require zero wait state, (assume external mem requires no wait state
and BCR contains the value $00).
• R0 address register = $C000 (external X memory).
• R3 address register = $0052 (internal X memory).
Solution
To determine the number of instruction program words and the number of oscillator clock cycles required
for the given instruction, the user should perform the following steps:
1. Look up the number of instruction program words and the number of oscillator clock cycles
required for the opcode-operand portion of the instruction inTable A-11 on page A-18.
According to Table A-11 on page A-18, the MACR instruction will require one instruction
program word and will execute in (2 + mv) oscillator clock cycles. The term "mv"
represents the additional instruction program words (if any) and the additional oscillator
clock cycles (if any) that may be required over and above those needed for the basic MACR
instruction due to the parallel move portion of the instruction.
A-22
Table A-20. Memory Access Timing Summary
P Memory
I/O Access
Access
—
—
Int
Ext
—
—
—
—
X:(R0)+,Y0 X:(R3)+,X0
DSP56800 Family Manual
+ ax + ap
Access Cycle
— 0
— 1
wx
— —
— —
wp
Int —
— —
— —
— —
+ aio + axx
Cycle Cycle
— — —
— — —
0 — —
— —
2
— 0 —
— — 0
— — wx
— — 0