4.2.2.2
Post-Increment by 1: (Rn)+, (SP)+
The address of the operand is in the address register Rn or SP. After the operand address is used, it is
incremented by one and stored in the same address register. The type of arithmetic (linear or modulo) used
to increment Rn is determined by M01 for R0 and R1 and is always linear for R2, R3, and SP. The N
register is ignored. This reference is classified as a memory reference. See Figure 4-4.
Before Execution
B2
B1
B
A
6
5
35 32 31
15
$2501
X
$2500
X
R1
15
N
15
M01
15
Assembler syntax: X:(Rn)+, X:(SP)+, P:(Rn)+
Additional instruction execution cycles: 0
Additional effective address program words: 0
Figure 4-4. Address Register Indirect: Post-Increment
Post-Increment Example:
B0
4
3
F
E
D
C
16 15
0
X Memory
0
X
X
X
X
X
X
$2500
0
(n/a)
0
$FFFF
0
Address Generation Unit
MOVE B0,X:(R1)+
After Execution
B2
B1
B
A
6
5
4
3
35 32 31
16 15
X Memory
15
$2501
X
X
X
$2500
F
E
D
R1
$2501
15
N
(n/a)
15
M01
$FFFF
15
Addressing Modes
B0
F
E
D
C
0
0
X
C
0
0
0
AA0017
4-11