Motorola DSP56800 Manual page 114

Address Generation Unit
Example 4-6. No Dependency with No Address Arithmetic Calculation
MOVE #$7,R1
MOVE R1,X:$0004
Example 4-7 represents a special case. For the X:(Rn+xxxx) addressing mode, there is no pipeline
dependency even if the same Rn register is written on the previous cycle. This is true for R0-R3 as well as
the SP register. Since there is no dependency, no extra instruction cycles are inserted.
MOVE #$7,R1
MOVE X:(R1+$3456),X0
In Example 4-8 there is a pipeline dependency since the N register is used in the second instruction. This is
true for using N to update R0-R3 as well as the SP register. For the case where a dependency is caused by
a write to the N register, the DSP core automatically stalls the pipeline by inserting one extra instruction
cycle. Thus, this sequence is allowed. This dependency also exists for the (Rn+N) addressing mode.
Example 4-8. Dependency with a Write to the Offset Register
MOVE #$7,N
MOVE X:(R2)+N,X0
In Example 4-9 there is a pipeline dependency since the N register is used in the second instruction. This is
true for using N to update R0-R3 as well as the SP register. For the case where a dependency is caused by
a bit-field operation on the N register, this sequence is not allowed and is flagged by the assembler. This
sequence may be fixed by rearranging the instructions or inserting a NOP between the two instructions.
This dependency only applies to the BFSET, BFCLR, or BFCHG instructions. There is no dependency for
the BFTSTH, BFTSTL, BRCLR, or BRSET instructions. This dependency also exists for the (Rn+N)
addressing mode.
Example 4-9. Dependency with a Bit-Field Operation on the Offset Register
BFSET #$7,N
MOVE X:(R2)+N,X0
In Example 4-10 there is a pipeline dependency since the address pointer register written in the first
instruction is used in an address calculation in the second instruction. For the case where a dependency is
caused by a write to one of these registers, this sequence is not allowed and is flagged by the assembler.
This sequence may be fixed by rearranging the instructions or inserting a NOP between the two
instructions.
Example 4-10. Dependency with a Write to an Address Pointer Register
MOVE #$7,R2
MOVE X:(R2)+,X0
In Example 4-11 there is a pipeline dependency since the M01 register written in the first instruction is
used in an address calculation in the second instruction. For the case where a dependency is caused by a
write to the M01 register, this sequence is not allowed and is flagged by the assembler. This sequence may
be fixed by rearranging the instructions or inserting a NOP between the two instructions.
4-34
; Write to R1 register
; No address arithmetic calculation
; performed
Example 4-7. No Dependency with (Rn+xxxx)
; Write to R1 register
; X:(Rn+xxxx) addressing mode
; using R1
; Write to the N register
; N register used in address
; arithmetic calculation
; Bit-field operation on the N
; register
; N register used in address
; arithmetic calculation
; Write to the R2 register
; R2 register used in address
; arithmetic calculation
DSP56800 Family Manual