Motorola DSP56800 Manual page 372

OR
Operation:
S + D → D
S + D[31:16] → D[31:16]
where + denotes the logical inclusive OR operator
Description: Logically OR the source operand (S) with the destination operand (D) and store the result in the desti-
nation. This instruction is a 16-bit operation. If the destination is a 36-bit accumulator, the source is
ORed with bits 31–16 of the accumulator. The remaining bits of the destination accumulator are not
affected.
Usage: This instruction is used for the logical OR of two registers. If it is desired to OR a 16-bit immediate
value with a register or memory location, then the ORC instruction is appropriate.
Example:
OR
Before Execution
0 1234
B2 B1
Y1
FF00
Explanation of Example:
Prior to execution, the 16-bit Y1 register contains the value $FF00, and the 36-bit B accumulator con-
tains the value $0:1234:5678. The OR Y1,B instruction logically ORs the 16-bit value in the Y1 reg-
ister with B1 and stores the 36-bit result in the B accumulator.
Condition Codes Affected:
15 14
LF *
A-142
Logical Inclusive OR
(no parallel move)
(no parallel move)
Y1,B
5678
B0
MR
13 12 11 10 9
* * * * I1
N — Set if bit 31 of A or B result is set
Z — Set if bits 31–16 of A or B result are zero
V — Always cleared
DSP56800 Family Manual
Assembler Syntax:
OR S,D
OR S,D
; OR Y1 with B
After Execution
0 FF34
B2 B1
Y1
FF00
CCR
8 7 6 5 4
I0 SZ L E U
(no parallel move)
(no parallel move)
5678
B0
3 2 1 0
N Z V C
OR