Motorola DSP56800 Manual page 364

16-bit digital signal processor
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NEG
Operation:
0 - D →
D
(parallel move)
Description: The destination operand (D) is subtracted from zero, and the two's complement result is stored in the
destination accumulator.
Usage:
This instruction is used for negating a 36-bit accumulator. It can also be used to negate a 16-bit value
loaded in the MSP of an accumulator if the LSP of the accumulator is $0000 (see Section 8.1.6, "Un-
signed Load of an Accumulator," on page 8-7).
Example:
NEG
Before Execution
0
1234
B2
B1
SR
0300
Explanation of Example:
Prior to execution, the 36-bit B accumulator contains the value $0:1234:5678. The NEG B instruction
takes the two's-complement of the value in the B accumulator and stores the 36-bit result back in the
B accumulator.
Condition Codes Affected:
15
14
LF
*
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
A-134
Negate Accumulator
X0,X:(R3)+; 0-B → B, save X0, update R3
B
5678
B0
MR
13
12
11
10
9
*
*
*
*
I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
— Set if limiting (parallel move) or overflow has occurred in result
E
— Set if the signed integer portion of A or B is in use
U
— Set according to the standard definition of the U bit
N
— Set if bit 35 of A or B result is set except during saturation
Z
— Set if A or B result equals zero
V
— Set if overflow has occurred in A or B result
C
— Set if a borrow is generated from the MSB of the result
DSP56800 Family Manual
Assembler Syntax:
NEG
D
After Execution
F
EDCB
B2
B1
SR
0309
CCR
8
7
6
5
4
I0 SZ
L
E
U
NEG
(parallel move)
A988
B0
3
2
1
0
N
Z
V
C

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