Dsp56800 Family Architecture; Figure 1-1 Dsp56800-Based Dsp Microcontroller Chip - Motorola DSP56800 Manual

Chapter 1
Introduction
The DSP56800 Digital Signal Processors provide low cost, low power, mid-performance computing,
combining DSP power and parallelism with MCU-like programming simplicity. The DSP56800 core is a
general-purpose central processing unit, designed for both efficient digital signal processing and a variety
of controller operations.
1.1

DSP56800 Family Architecture

The DSP56800 Family uses the DSP56800 16-bit DSP core. This core is a general-purpose central
processing unit (CPU), designed for both efficient DSP and controller operations. Its instruction-set
efficiency as a DSP is superior to other low-cost DSP architectures and has been designed for efficient,
straightforward coding of controller-type tasks.
Memory
PLL
Figure 1-1. DSP56800-Based DSP Microcontroller Chip
The general-purpose MCU-style instruction set, with its powerful addressing modes and bit-manipulation
instructions, enables a user to begin writing code immediately, without having to worry about the
complexities previously associated with DSPs. A software stack allows for unlimited interrupt and
subroutine nesting, as well as support for structured programming techniques such as parameter passing
Peripherals
16-Bit DSP
CPU Core
Introduction
GPIO I/O Pins
External
Address
Bus
Interface
Data
Debug
JTAG I/O
Port
AA0012
1-1