Motorola DSP56800 Manual page 400

16-bit digital signal processor
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TST
Operation:
S - 0
(parallel move)
Description: Compare the specified source accumulator (S) with zero, and set the condition codes accordingly. No
result is stored, although the condition codes are updated.
Example:
TST
Before Execution
8
0203
A2
A1
SR
0300
Explanation of Example:
Prior to execution, the 36-bit A accumulator contains the value $8:0203:0000, and the 16-bit SR con-
tains the value $0300. Execution of the TST A instruction compares the value in the A register with
zero and updates the CCR accordingly. The contents of the A accumulator are not affected.
Condition Codes Affected:
15
14
LF
*
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
A-170
Test Accumulator
A
X:(R0)+N,B
0000
A0
MR
13
12
11
10
9
*
*
*
*
I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
— Set if data limiting has occurred during parallel move
E
— Set if the signed integer portion of A or B result is in use
U
— Set according to the standard definition of the U bit
N
— Set if bit 35 of A or B result is set except during saturation
Z
— Set if A or B result equals zero
V
— Always cleared
C
— Always cleared
DSP56800 Family Manual
Assembler Syntax:
TST
S
; set condition codes for the value
; in A, update B and R0
After Execution
8
0203
A2
A1
SR
0338
CCR
8
7
6
5
4
I0 SZ
L
E
U
(parallel move)
0000
A0
3
2
1
0
N
Z
V
C
TST

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