Instruction Aliases; Andc, Eorc, Orc, And Notc Aliases; Table 6-9 Aliases For Logical Instructions With Immediate Data - Motorola DSP56800 Manual

Instruction Set Introduction
Table 6-8. Program Control Instruction List (Continued)
Instruction
6.5

Instruction Aliases

The DSP56800 assembler provides a number of additional useful instruction mnemonics that are actually
aliases to other instructions. Each of these instructions is mapped to one of the core instructions and
disassembles as such.
6.5.1

ANDC, EORC, ORC, and NOTC Aliases

The DSP56800 instruction set does not support logical operations using 16-bit immediate data. It is
possible to achieve the same result, however, using the bit-manipulation instructions. To simplify
implementing these operations, the DSP56800 assembler provides the following operations:
• ANDC—logically AND a 16-bit immediate value with a destination
• EORC—logically exclusive OR a 16-bit immediate value with a destination
• ORC—logically OR a 16-bit immediate value with a destination
• NOTC—logical one's-complement of a 16-bit destination
These operations are not new instructions, but aliases to existing bit-manipulation instructions. They are
mapped as shown in Table 6-9.
Table 6-9. Aliases for Logical Instructions with Immediate Data
Desired
Instruction
ANDC
ORC
EORC
NOTC
6-12
JMP Jump
JSR Jump to subroutine
NOP No operation
RTI Return from interrupt
RTS Return from subroutine
STOP Stop processing (lowest power standby)
SWI Software interrupt
WAIT Wait for interrupt (low power standby)
Operands
#xxxx,DST
#xxxx,DST
#xxxx,DST
DST
DSP56800 Family Manual
Description
Remapped
Operands
Instruction
BFCLR #xxxx,DST
BFSET #xxxx,DST
BFCHG #xxxx,DST
BFCHG #$FFFF,DST