Motorola DSP56800 Manual page 291

16-bit digital signal processor
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BRCLR
Instruction Fields:
Operation
BRCLR
#MASK8,DDDDD,AA
#MASK8,X:(R2+xx),AA
#MASK8,X:(SP-xx),AA
#MASK8,X:aa,AA
#MASK8,X:pp,AA
#MASK8,X:xxxx,AA
Timing:
Refer to the preceding Instruction Fields table
Memory:
Refer to the preceding Instruction Fields table
Branch if Bits Clear
Operands
C
10/8
12/10
12/10
10/8
10/8
12/10
Instruction Set Details
W
Comments
2
BRCLR tests all bits selected by the immediate
mask. If all selected bits are clear, then the carry
2
bit is set and a PC relative branch occurs. Other-
wise it is cleared and no branch occurs.
2
All registers in DDDDD are permitted except
2
HWS.
2
MASK8 specifies a 16-bit immediate value where
either the upper or lower 8 bits contains all zeros.
3
AA specifies a 7-bit PC relative offset.
X:aa represents a 6-bit absolute address. Refer
to Absolute Short Address (Direct Address-
ing): <aa> on page 4-22.
X:pp represents a 6-bit absolute I/O address.
Refer to I/O Short Address (Direct Address-
ing): <pp> on page 4-23.
BRCLR
A-61

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