Table 6-23 Data Alu Extended Precision Multiplication Instructions; Table 6-24 Data Alu Arithmetic Instructions - Motorola DSP56800 Manual

16-bit digital signal processor
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Table 6-22. Data ALU Multiply Instructions (Continued)
Operation
MPYR
Table 6-23. Data ALU Extended Precision Multiplication Instructions
Operation
MACSU
MPYSU
Operation
ABS
ADC
ADD
CLR
Operands
(±)Y1,X0,FDD
(±)Y0,X0,FDD
(±)Y1,Y0,FDD
(±)Y0,Y0,FDD
(±)A1,Y0,FDD
(±)B1,Y1,FDD
Operands
X0,Y1,FDD
X0,Y0,FDD
Y0,Y1,FDD
Y0,Y0,FDD
Y0,A1,FDD
Y1,B1,FDD
X0,Y1,FDD
X0,Y0,FDD
Y0,Y1,FDD
Y0,Y0,FDD
Y0,A1,FDD
Y1,B1,FDD
Table 6-24. Data ALU Arithmetic Instructions
Operands
C
F
2
Y,F
2
DD,FDD
2
F1,DD
~F,F
Y,F
X:(SP-xx),FDD
6
X:aa,FDD
4
X:xxxx,FDD
6
FDD,X:(SP-xx)
8
FDD,X:xxxx
8
FDD,X:aa
6
#xx,FDD
4
#xxxx,FDD
6
F
2
F1DD
2
Rj
N
Instruction Set Introduction
DSP56800 Instruction Set Summary
C
W
2
1
Fractional multiply where one operand is
optionally negated before multiplication. Result
is rounded
Note: Assembler also accepts first two oper-
ands when they are specified in opposite order
C
W
2
1
Signed or unsigned 16x16 fractional MAC with
32-bit result.
The first operand is treated as signed and the
second as unsigned.
2
1
Signed or unsigned 16x16 fractional multiply
with 32-bit result.
The first operand is treated as signed and the
second as unsigned.
W
Comments
1
Absolute value.
1
Add with carry (sets C bit also).
1
36-bit addition of two registers.
1
Add memory word to register.
1
X:aa represents a 6-bit absolute address. Refer to
2
Absolute Short Address (Direct Addressing): <aa>
on page 4-22
2
Add register to memory word, storing the result back to
memory.
2
2
1
Add an immediate integer 0–31.
2
Add a signed 16-bit immediate.
1
Clear 36-bit accumulator and set condition codes.
1
Identical to move #0,<reg>; does not set condition
codes.
Comments
Comments
6-21

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