Specifications
Type
Model
CP1L-M40DR-A
CP1L-M40DR-D
CP1L-M40DT-D
CP1L-M40DT1-D
HR Area
24,576 bits (512 words): H0.00 to H1535.15 (words H0 to H1535)
AR Area
Read-only (Write-prohibited)
7,168 bits (448 words): A0.00 to A447.15 (words A0 to A447)
Read/Write
8,192 bits (512 words): A448.00 to A959.15 (words A448 to A959)
Timers
4,096 bits: T0 to T4095
Counters
4,096 bits: C0 to C4095
DM Area
32 Kwords: D0 to D32767
Note Initial data can be transferred to the CPU
DM fixed allocation words for Modbus-RTU Easy
Master
D32200 to D32249 for Serial Port 1, D32300 to
D32349 for Serial Port 2
Data Register
16 registers (16 bits): DR0 to DR15
Area
Index Register
16 registers (16 bits): IR0 to IR15
Area
Task Flag Area
32 flags (32 bits): TK0 to TK31
Trace Memory
4,000 words (500 samples for the trace data maximum of 31 bits and 6 words.)
2-2-3
I/O Specifications
I/O Terminal Blocks of CPU Units with 40 I/O Points
Input Terminal Block (Top Block)
AC Power Supply Models
L1
L2/N COM 01
DC Power Supply Models
+
NC
M CPU Units
CP1L-M30DR-A
CP1L-M30DR-D
CP1L-M30DT-D
CP1L-M30DT1-D
Unit's built-in flash memory using the data
memory initial data transfer function. A set-
ting in the PLC Setup can be used so that
the data in flash memory is transferred to
RAM at startup.
03
05
00
02
04
06
Inputs (CIO 0)
−
COM 01
03
05
00
02
04
06
Inputs (CIO 0)
CP1L-L20DR-A
CP1L-L20DR-D
CP1L-L20DT-D
CP1L-L20DT1-D
10 Kwords: D0 to D9999 and D32000 to D32767
Note Initial data can be transferred to the CPU
Unit's built-in flash memory using the data
memory initial data transfer function. A set-
ting in the PLC Setup can be used so that
the data in flash memory is transferred to
RAM at startup.
DM fixed allocation words for Modbus-RTU Easy
Master
D32300 to D32349 for Serial Port 1
07
09
11
01
03
08
10
00
02
04
Inputs (CIO 1)
07
09
11
01
03
08
10
00
02
04
Inputs (CIO 1)
Section 2-2
L CPU Units
CP1L-L14DR-A
CP1L-L14DR-D
CP1L-L14DT-D
CP1L-L14DT1-D
05
07
09
11
06
08
10
05
07
09
11
06
08
10
45