Siemens HiPath 3000 Series Service Documentation page 225

Nur für den internen Gebrauch
Signal Name
BGx_0A,
BGx_0B
HO0 ... HO3
HI0 ... HI3
WHO0 ... WHO3
WHI0 ... WHI3
HDI
HDO
PRS
BA0 ... BA6
FMB
CKA
(CLS)
RCLK
RAC
LWLOOP
TOUT
TCK
Table 3-36 SIPAC Connector Contact Assignment
A31003-H3590-S100-7-7620, 06/2012
HiPath 3000/5000 V9, Service documentation
Connector contact
X1-02, X1-26
X1-06, X1-08
X1-10, X2-02
X2-04, X2-06
X2-08, X2-10
X3-02, X3-04
X3-06, X3-08
X3-10, X4-02
X8-22, X7-30, X8-44,
X8-42
X9-24, X9-02, X9-44,
X9-42
X6-32, X6-33, X6-34,
X6-35
X7-31, X7-32, X7-33,
X7-34
X9-06
X8-04
X7-26
X7-06, X7-28, X8-26
X8-28, X9-04, X8-06,
X8-2
X9-22
X8-08
X8-10
X7-02
X7-04
X4-04
X6-48
X7-44
Signal description
Sets 0 to 7 AB pair
Old PCM lines (2.048 Mbps)
Old PCM lines (2.048 Mbps)
New PCM lines (2.048 Mbps)
New PCM lines (2.048 Mbps)
HDLC lines
HDLC lines
System reset
Frame address recognition
Clock synchronization signal
System clock (2.048 MHz)
Clock selection
(CLS=GND --> CKA=2.048 MHz)
The (CLS) pin should be
earthed on the backplane.
Reference clock
Reference clock activation
Low-active for activating RCLK
Tristate for deactivating CLK
Output for result of self-check
Output for result of self-check
Boundary scan: check clock
boards.fm
Boards for HiPath 3000
Peripheral boards
Direction
Not connected
Input
Output
Input
Output
Input
Output
Input
Input
Input
Input
Input
Output
Output tristate
Not connected
Not connected
Not connected
3-93