Operand Addressing (Byte, Word And Double Word) - HEIDENHAIN iTNC 530 Technical Manual

8.6.2 Operand Addressing (Byte, Word and Double Word)

Double word Word
D0 W2
W0
D4 W6
W4
• •
• •
• •
D9996 W9998
W9996
February 2002
The memory for operands B (8 bits), W (16 bits), D (32 bits) is only 8 bits wide.
Since the operands can be 8, 16 or 32 bits wide, an overlap of the memory
areas will occur, which you must take into account when addressing the
memory.
Byte
B3
B2
B1
B0
B7
B6
B5
B4
•
•
•
B9999
B9998
B9997
B9996
During byte addressing, every address is accessible; during word addressing,
every second address; and during double word addressing, every fourth of 0
to 9996. The address parameter indicates the low byte of the word address
(W) and the lowest byte of the double-word address (D).
Markers, timers and counters are addressed with the corresponding code
letters M, T or C followed by the operand number (e.g. M500, T7, C18).
Operands
Memory Word address Double word
8 bits High byte
8 bits Low byte
8 bits High byte
8 bits Low byte
8 bits High byte
8 bits Low byte
8 bits
8 bits
• •
• •
• •
8 bits High byte
8 bits Low byte
8 bits High byte
8 bits Low byte
address
Highest byte
Lowest byte
•
•
•
Highest byte
Lowest byte
8 – 39