6.11
Free function blocks
6.11.1
Overview
The free function blocks permit configurable signal processing in the inverter.
The following free function blocks are available:
● AND, OR, XOR, and NOT logic
● RSR (RS flip-flop), DSR (D flip-flop) flip-flops
● Timers MFP (pulse generator), PCL (pulse shortening), PDE (ON delay), PDF (OFF
delay), and PST (pulse stretching)
● ADD (adder), SUB (subtractor), MUL (multiplier), DIV (divider), AVA (absolute value
generated), NCM (comparator), and PLI (polyline) arithmetic functions
● LIM (limiter), PT1 (smoothing), INT (integrator), DIF (differentiator) controllers
● NSW (analog) BSW (binary) switches
● LVM limit value monitoring
The number of free function blocks in the inverter is limited. You can only use a function
block once. The inverter has 3 adders, for instance. If you have already configured three
adders, then no other adders are available.
6.11.2
Further information
Application description for the free function blocks
Further information is provided in the Internet:
Function Manual
(https://support.industry.siemens.com/cs/gb/en/view/60467055/29243398027)
6.12
Selecting physical units
6.12.1
Select the motor standard
Selection options and parameters involved
The inverter represents the motor data corresponding to motor standard IEC or NEMA in
different system units: SI units or US units.
Distributed converter for SIMOGEAR geared motors
Operating Instructions, 09/2017, FW V4.7.9, A5E31298649B AH
Advanced commissioning
6.11 Free function blocks
189