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R
5.2.1
Motherboard Layout Rules for AGTL/AGTL+ Signals
Ground Reference
It is strongly recommended that AGTL/AGTL+ signals be routed on the signal layer next to the
ground layer (referenced to ground). It is important to provide an effective signal return path with
low inductance. The best signal routing is directly adjacent to a solid GND plane with no splits or
cuts. Eliminate parallel traces between layers not separated by a power or ground plane. If a signal
has to go through routing layers, the recommendations are in the following list.
Note: Following these layout rules is critical for AGTL/AGTL+ signal integrity, particularly for
0.18-micron and smaller process technology.
For signals going from a ground reference to a power reference, add capacitors between
ground and power near the vias to provide an AC return path. One capacitor should be used
for every three signal lines that change reference layers. Capacitor requirements are as
follows: C=100 nF, ESR=80 m , ESL=0.6 nH. Refer to Figure 20 for an example of
switching reference layers.
For signals going from one ground reference to another, separate ground reference, add vias
between the two ground planes to provide a better return path.
Figure 20. AGTL/AGTL+ Trace Routing
Layer 2
Layer 3
Reference Plane Splits
Splits in reference planes disrupt signal return paths and increase overshoot/undershoot due to
significantly increased inductance.
Processor Connector Breakout
It is strongly recommended that AGTL/AGTL+ signals do not traverse multiple signal layers. Intel
recommends breaking out all signals from the connector on the same layer. If routing is tight,
break out from the connector on the opposite routing layer over a ground reference and cross over
to main signal layer near the processor connector.
®
Intel
815 Chipset Platform Design Guide
GMCH
0-500 mils
System Bus Design Guidelines
1.2V Power Plane
Ground Plane
1.5-3.5 inches
Processor
Socket Pin
AGTL_trace_route
47
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