Vtt Decoupling Design; Vref Decoupling Design; Figure 30. Capacitor Placement On The Motherboard - Intel 815 Design Manual

Chipset platform for use with universal socket 370
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System Bus Design Guidelines

Figure 30. Capacitor Placement on the Motherboard

5.11.2

VTT Decoupling Design

For Itt = 2.3 A (maximum)
Twenty 0.1 F capacitors in 0603 packages placed as closed as possible to the processor VTT
pins. The capacitors are shown on the exterior of the previous figure.
5.11.3

VREF Decoupling Design

Four 0.1 F capacitors in 0603 package placed near VREF pins (within 500 mils).
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815 Chipset Platform Design Guide
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