Table 9-18. Miscellaneous Instruction Execution Times
Instruction
ANDI to CCR
ANDI to SR
CHK
EORI to CCR
EORI to SR
EXG
EXT
LINK
MOVE from CCR
MOVE to CCR
MOVE from SR
MOVE to SR
MOVE from USP
MOVE to USP
MOVEC
MOVEP
NOP
ORI to CCR
ORI to SR
RESET
RTD
RTE
Long, Retry Read
Long, Retry Write
Long, No Retry
RTR
RTS
STOP
SWAP
TRAPV
UNLK
+Add effective address calculation time.
+Use nonfetching effective address calculation time.
**Source or destination is a memory location for the MOVEP instruction and a control register
for the MOVEC instruction.
9-12
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
Size
Register
—
16(2/0)
—
16(2/0)
—
8(1/0)+
—
16(2/0)
—
16(2/0)
—
6(1/0)
Word
4(1/0)
Long
4(1/0)
—
16(2/2)
—
4(1/0)
—
12(2/0)
—
4(1/0)
—
12(2/0)
—
6(1/0)
—
6(1/0)
—
—
Word
—
Long
—
—
4(1/0)
—
16(2/0)
—
16(2/0)
—
130(1/0)
—
16(4/0)
Short
24(6/0)
112(27/10)
112(26/1)
110(26/0)
—
20(5/0)
—
16(4/0)
—
4(0/0)
—
4(1/0)
—
4(1/0)
—
12(3/0)
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Memory
Destination**
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
8(1/1)+*
—
12(2/0)+
—
8(1/1)+*
—
12(2/0)+
—
—
—
—
—
—
10(2/0)
—
16(2/2)
—
24(2/4)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Source**
Register
—
—
—
—
—
—
—
—
—
—
—
—
—
—
12(2/0)
16(4/0)
24(6/0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MOTOROLA