Motorola M68000 User Manual page 51

8-/16-/32-bit microprocessors
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The word and byte write-cycle timing diagram and flowcharts in Figures 5-5, 5-6, and 5-7
applies directly to the MC68000, the MC68HC000, the MC68HC001 (in 16-bit mode), the
MC68EC000 (in 16-bit mode), and the MC68010.
BUS MASTER
ADDRESS THE DEVICE
1) PLACE FUNCTION CODE ON FC2–FC0
2) PLACE ADDRESS ON A23–A1
3) ASSERT ADDRESS STROBE (AS)
4) SET R/W TO WRITE
5) PLACE DATA ON D15–D0
6) ASSERT UPPER DATA STROBE (UDS)
AND LOWER DATA STROBE (LDS)
TERMINATE OUTPUT TRANSFER
1) NEGATE UDS AND LDS
2) NEGATE AS
3) REMOVE DATA FROM D15–D0
4) SET R/W TO READ
START NEXT CYCLE
BUS MASTER
ADDRESS THE DEVICE
1) PLACE FUNCTION CODE ON FC2–FC0
2) PLACE ADDRESS ON A23–A1
3) ASSERT ADDRESS STROBE (AS)
4) SET R/W TO WRITE
5) PLACE DATA ON D0–D7 OR D15–D8
(ACCORDING TO INTERNAL A0)
6) ASSERT UPPER DATA STROBE (UDS)
OR LOWER DATA STROBE (LDS)
(BASED ON INTERNAL A0)
TERMINATE OUTPUT TRANSFER
1) NEGATE UDS AND LDS
2) NEGATE AS
3) REMOVE DATA FROM D7-D0 OR
D15-D8
4) SET R/W TO READ
START NEXT CYCLE
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
Figure 5-5. Word Write-Cycle Flowchart
Figure 5-6. Byte Write-Cycle Flowchart
For More Information On This Product,
Go to: www.freescale.com
SLAVE
INPUT THE DATA
1) DECODE ADDRESS
2) STORE DATA ON D15–D0
3) ASSERT DATA TRANSFER
ACKNOWLEDGE (DTACK)
TERMINATE THE CYCLE
1) NEGATE DTACK
SLAVE
INPUT THE DATA
1) DECODE ADDRESS
2) STORE DATA ON D7–D0 IF LDS IS
ASSERTED. STORE DATA ON D15–D8
IF UDS IS ASSERTED
3) ASSERT DATA TRANSFER
ACKNOWLEDGE (DTACK)
TERMINATE THE CYCLE
1) NEGATE DTACK
5- 5

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Mc68hc000Mc68hc001Mc68008Mc68010Mc68ec000

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