the handler routine. The total number of clock periods, the number of read cycles, and the
number of write cycles are shown in the previously described format. The number of clock
periods, the number of read cycles, and the number of write cycles, respectively, must be
added to those of the effective address calculation where indicated by a plus sign (+).
MOTOROLA
MC68000 8-/16-/32-MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
Table 8-14. Exception Processing
Execution Times
Exception
Address Error
Bus Error
CHK Instruction
Divide by Zero
Illegal Instruction
Interrupt
Privilege Violation
RESET **
Trace
TRAP Instruction
TRAPV Instruction
+ Add effective address calculation time.
* The interrupt acknowledge cycle is assumed to take
four clock periods.
** Indicates the time from when RESET and HALT are first
sampled as negated to when instruction execution starts.
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Periods
50(4/7)
50(4/7)
40(4/3)+
38(4/3)+
34(4/3)
44(5/3)*
34(4/3)
40(6/0)
34(4/3)
34(4/3)
34(5/3)
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