Motorola M68000 User Manual page 28

8-/16-/32-bit microprocessors
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Table 2-2. Instruction Set Summary (Sheet 4 of 4)
Opcode
RTE
If supervisor state
then (SP)
SP + 4
restore state and deallocate stack according to (SP)
else TRAP
RTR
(SP)
CCR; SP + 2
(SP)
PC; SP + 4
RTS
(SP)
PC; SP + 4
SBCD
Destination 10 – Source 10 – X
Scc
If condition true
then 1s
else 0s
Destination
STOP
If supervisor state
then Immediate Data
else TRAP
SUB
Destination – Source
SUBA
Destination – Source
SUBI
Destination – Immediate Data
SUBQ
Destination – Immediate Data
SUBX
Destination – Source – X
SWAP
Register [31:16]
TAS
Destination Tested
Destination
TRAP
SSP – 2
SSP – 4
SSP; PC
SR
(SSP); Vector Address
TRAPV
If V then TRAP
TST
Destination Tested
UNLK
An
SP; (SP)
NOTE: d is direction, L or R.
2-14
M68000 8-/16-/32-BIT MICROPROCESSOR USER'S MANUAL
Freescale Semiconductor, Inc.
Operation
SR; SP + 2
SP; (SP)
SP;
SP;
SP
SP
Destination
Destination
SR; STOP
Destination
Destination
Destination
Destination
Destination
Register [15:0]
Condition Codes; 1
SSP; Format/Offset
(SSP);
(SSP); SSP–2
PC
Condition Codes
An; SP + 4
SP
For More Information On This Product,
Go to: www.freescale.com
RTE
PC;
RTR
RTS
SBCD Dx,Dy
SBCD –(Ax),–(Ay)
Scc <ea>
STOP # <data>
SUB <ea>,Dn
SUB Dn,<ea>
SUBA <ea>,An
SUBI # <data>,<ea>
SUBQ # <data>,<ea>
SUBX Dx,Dy
SUBX –(Ax),–(Ay)
SWAP Dn
bit 7 of
TAS <ea>
TRAP # <vector>
SSP;
TRAPV
TST <ea>
UNLK An
S y n t a x
MOTOROLA

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