Electrical Specifications
2
Electrical Specifications
This chapter describes the electrical specifications of the Intel
9300 Series and 9500 Series processors.
®
2.1
Intel
Scalable Memory Interconnect
Differential Signaling
The links for Intel
Interconnect (Intel
referred to as FB-DIMM pins on the package. The termination voltage level for the
processor for uni-directional serial differential links, each link consisting of a pair of
opposite-polarity (D+, D-) signals, is V
Termination resistors are provided on the processor silicon and are terminated to V
thus eliminating the need to terminate the links on the system board for the Intel
QuickPath Interconnect and FB-DIMM signals.
When designing a system, Intel strongly recommends that design teams perform
analog simulations of the Intel
refer to the latest available revision of the Intel
®
Intel
Itanium
Figure 2-1
All the differential signals listed in
table are the debug signals.
Figure 2-1.
Active ODT for a Differential Link Example
®
®
Intel
Itanium
Processor 9300 Series and 9500 Series Datasheet
QuickPath Interconnect and Intel
®
QuickPath Interconnect (Intel
®
SMI) signals use differential signaling. The Intel
®
QuickPath Interconnect and FB-DIMM pins. Please
®
Processor 9500 Series Platform Design Guide.
illustrates the active on-die termination (ODT) of these differential signals.
T
X
R
R
TT
TT
®
QPI) and Intel
.
SS
®
®
Itanium
Table 2-1
have ODT resistors. Also included in the
Signal
Signal
R
TT
®
®
Itanium
Processor
®
®
Scalable Memory
®
SMI bus pins are
®
Processor 9300 Series and
R
X
R
TT
SS,
23