Debug Signal Group Dc Specifications; Pirom Signal Group Dc Specifications - Intel BX80569Q9550 - Core 2 Quad 2.83 GHz Processor Datasheet

Notes:
1. These parameters are based on design characterization and are not tested.
2. With 50Ω termination to VCCIO at the far end.
Table 2-34. Debug Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OH
V
OL
I
OL
I
ILeak
I
OLeak
Notes:
1. With 2 parallel 50Ω termination to VCCIO at the far end.
2. With input leakage current measured at the pin with 0V and with 1.1V supplied to the pin. System designers
are advised to check the tolerance of their voltage regulator solutions to ensure Vpin of 1.1 V.
Table 2-35. PIROM Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OL2
V
OL1
I
ILeak
I
OLeak
Notes:
1. V (min) and V
IL
2. Applicable over recommended operating range T = -40 °C to +88 °C; Vcc = +1.7 V to +3.6 V.
56
Parameter
Input Low Voltage
Input High Voltage (VCCIO*0.67) + 0.2
Output High Voltage
Output Low Voltage
Output Low Current
Input Leakage Current
Output Leakage Current
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage (I
OL
= 2.1 mA)
Output Low Voltage (I
OL
= 0.15 mA)
Input Leakage Current
Output Leakage Current
(max) are reference only and are not tested.
IH
Min
0 (VCCIO*0.67) - 0.2
VCCIO
VCCIO-0.2 VCCIO
0
13
–1000
–1000
Min TYP
-0.6
Vcc*0.7
0.1
0.05
® ®
Intel Itanium Processor 9300 Series and 9500 Series Datasheet
Electrical Specifications
Max Unit Notes
V
V
V
0.35 V
23 mA
200 µA
200 µA
Max Unit Notes
Vcc*0.3
Vcc +0.5
0.4
0.2
3.0
3.0
1
1
2
2,1
2,1
2
2
2
2