Intel Itanium Processor 9500 Series Overview; Processor 9300 Series Processor Block Diagram - Intel BX80569Q9550 - Core 2 Quad 2.83 GHz Processor Datasheet

Intel itanium processor quad-core 1.86-1.73 ghz with 24 mb l3 cache 9350, intel itanium processor quad-core 1.73-1.60 ghz with 20 mb l3 cache 9340, intel itanium processor quad-core 1.60-1.46 ghz with 20 mb l3 cache 9330, intel itanium processor quad-core
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Figure 1-1.
Intel
Itanium
Core0
CPE0
Intel® SMI
Pbox
Zbox0
PZ0
Intel® SMI
®
1.2.2
Intel
The Intel
to eight cores, each with its own First Level Cache (FLC) and Mid Level Cache (MLC),
both of which are split into instruction and data caches (FLI/FLD and MLI/MLD,
respectively). The Last Level Cache (LLC) is shared among the cores and supports up to
32 MB. Also supported are the following page sizes for purges or inserts: 4K, 8K, 16K,
64K, 256K, 1M, 4M, 16M, 64M, 256M, 1G, 4G.
The architecture interfacing the cores to the system is referred to as the uncore. Each
®
Intel
Itanium
connectivity to the Last Level Cache via the Cache Controllers (Cboxes). The Ring also
provides connectivity to Intel QPI via Ring/Sbox. The Sbox and Cbox provide the
supports for the two Intel QPI Caching Agents. The processor has two Home Agents
(Bbox). The Bbox interfaces between the memory controller and the Intel
Interconnect and supports a directory cache. Each memory controller supports two
®
Intel
Scalable Memory Interconnects (Intel
interconnects to Scalable Memory Buffer. The Intel
processor supports six Intel
two half width. The Caching Agent, Home Agent, and Intel
are connected via a 10-port Crossbar Router, each port supporting the Intel
Interconnect protocol.
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Processor 9300 Series Processor Block Diagram

Core1
CPE1
8
7
Bbox0
0xA
1
6
Pbox
Pbox
PH4
PR 0
Intel®
Intel®
QPI
QPI
®
Itanium
Processor 9500 Series Overview
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®
Itanium
Processor 9500 Series is an eight core architecture. It supports up
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Processor 9500 Series core interfaces to the Ring. The Ring provides
®
QuickPath Interconnects at the socket, four full width and
Figure 1-2
Core2
CPE2
3
2
Rbox
0
9
5
4
0xB
Pbox
Pbox
Pbox
Pbox
PR1
PR 2
PR 3
PH5
Intel®
Intel®
Intel®
Intel®
QPI
QPI
QPI
QPI
®
SMI) in lockstep. The Intel SMI are the
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Itanium
shows the processor block diagram.
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®
Intel
Itanium
Processor 9300 Series and 9500 Series Datasheet
Introduction
Core3
CPE3
Pbox
Bbox1
Zbox1
PZ1
®
QuickPath
®
Processor 9500 Series
®
QuickPath Interconnects
®
QuickPath
Intel® SMI
Intel® SMI

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