Tx Equalization Diagram - Intel BX80569Q9550 - Core 2 Quad 2.83 GHz Processor Datasheet
Intel itanium processor quad-core 1.86-1.73 ghz with 24 mb l3 cache 9350, intel itanium processor quad-core 1.73-1.60 ghz with 20 mb l3 cache 9340, intel itanium processor quad-core 1.60-1.46 ghz with 20 mb l3 cache 9330, intel itanium processor quad-core
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Electrical Specifications
Table 2-6.
Intel
®
Itanium
QuickPath Interconnect and Intel
Symbol
T
Minimum eye width at pin for clk and data
RX-eye-pin
QPI BER
Bit Error Rate per lane valid for 4.8 and 6.4 GT/s
Lane
SMI BER
Bit Error Rate per lane valid for 4.8 and 6.4 GT/s
Lane
Notes:
1.
Parameter value at 1/4 Intel
2.
Parameter value at full Intel
3.
The termination small signal resistance; tolerance over the entire signalling voltage range shall not exceed ±5 ohms with
regard to the average of the values measured in the high output voltage state and the low output voltage state for that pin.
4.
HVM guaranteed error free value for stressed PRBS signaling across PVT. Link BER is the dominant spec of which eye
dimensions are only one factor, and improving another factor could compensate for eye height or width.
5.
HVM guaranteed error free value for stressed '1010 signaling across PVT. Link BER is the dominant spec of which eye
dimensions are only one factor, and improving another factor could compensate for eye height or width.
6.
See
Figure
2-8.
Figure 2-6.
TX Equalization Diagram
V pre = A(C
V pre = A(C
V post = A(C
V post = A(C
V sust = A(C
V sust = A(C
E xam ple: A=500m V, C
E xam ple: A=500m V, C
V pre = 0.500(-0.035 – 0.685 + 0.28) = 0.5(-0.44) = -220m V
V pre = 0.500(-0.035 – 0.685 + 0.28) = 0.5(-0.44) = -220m V
V post = 0.500(-0.035 + 0.685 + 0.28) = 0.5(0.93) = 465m V
V post = 0.500(-0.035 + 0.685 + 0.28) = 0.5(0.93) = 465m V
V sust = 0.500(-0.035 + 0.685 – 0.28) = 0.5(0.37) = 185m V
V sust = 0.500(-0.035 + 0.685 – 0.28) = 0.5(0.37) = 185m V
TX E Q -B O O S T = 20log(V post/V sust) = 20log(465/1 85) = 8dB
TX E Q -B O O S T = 20log(V post/V sust) = 20log(465/1 85) = 8dB
P eaking = 465/185 = 251%
P eaking = 465/185 = 251%
®
®
Intel
Itanium
Processor 9300 Series and 9500 Series Datasheet
®
Processor 9300 Series Receiver Parameter Values for Intel
Parameter
®
QPI Refclk.
®
QPI Refclk.
C
C
C
C
C
C
C
C
-1
-1
0
0
1
1
2
2
Vpost
Vpost
V pre
V pre
- C
- C
- C
- C
- C
- C
)
)
-1
-1
0
0
1
1
2
2
+ C
+ C
- C
- C
- C
- C
)
)
-1
-1
0
0
1
1
2
2
+ C
+ C
+ C
+ C
+ C
+ C
)
)
-1
-1
0
0
1
1
2
2
= -0.035, C
= -0.035, C
-1
-1
®
SMI Channels @ 4.8 GT (Sheet 2 of 2)
Min
Nom
0.6
C
C
A
A
V sust
V sust
0
0
-A
-A
C
C
= 1 – sum o f abs value of o ther coeficents
= 1 – sum o f abs value of o ther coeficents
0
0
V post - V pre – V sust = |C
V post - V pre – V sust = |C
-1
-1
% P eaking = V post/V sust
% P eaking = V post/V sust
= 0.685, C
= 0.685, C
= -0.28, C
= -0.28, C
= 0
= 0
0
0
1
1
2
2
Max
Units
Notes
UI
1.0E-14
Events
1.0E-12
Events
C
C
C
C
C
C
1
1
2
2
-1
-1
0
0
| + |C
| + |C
|+ |C
|+ |C
|+ |C
|+ |C
| = 1
| = 1
0
0
1
1
2
2
®
4
31
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