Intel S3210SHLX - Entry Server Board Motherboard Specification page 40

Product specification
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Functional Architecture
The management engine includes a TCO Timer used to detect system locks, Process Present
Indicator used to determine that the processor fetches the first instruction after reset, ECC Error
reporting from the host controller, Function Disable to prevent disabled function from generating
interrupts and power management events, and an Intruder Detect input for system cases.
3.2.3.16
Unused ICH9 Interfaces on the Server Board
The server board does not support the following interfaces on ICH9:
1. AC'97 2.3 Controller – ICH9 integrates an Audio Codec '97 Component Specifications,
Version 2.3 controller that can be used to attach an Audio Codec (AC), a Modem Codec
(MC), an Audio/Modem Codec (AMC) or a combination of ACs and a single MC.
2. Intel High Definition Audio
3. Management Engine (ME), SST, Fan tach and PWM, PEC controller
3.2.3.17
PCI Express* x4 Sub-system
®
The Intel
ICH9R supports one PCI Express* x4-lane interface that can also be configured as a
single x1 or x4-lane port. The PCI Express interface allows direct connection with the PXH-V or
dedicated PCIe* devices. (Fully compliant to the PCI Express* Base Specification, Rev 1.0a).
3.2.3.18
PCI
One 32-bit PCI bus segment is directed through the Intel
A. This PCI Segment A supports two PCI connectors and one embedded Intel
controller.
®
The Intel
ICH9R does not contain a PATA device controller in the chipset; therefore SATA
interface CDROM/DVD ROMs are recommended for use with the server board.
3.2.3.19
SATA Controller
®
The Intel
ICH9R contains six SATA ports. The data transfer rates up to 300Mbyte/s per port.
3.2.3.20
Compatibility Modules (DMA Controller, Timer/Counters, Interrupt
Controller)
®
The Intel
ICH9R provides the functionality of two-cascaded 82C59 with the capability to handle
15 interrupts. It also supports processor system bus interrupts.
3.2.3.21
Advanced Programmable Interrupt Controller (APIC)
Interrupt generation and notification to the processor is done by the APICs in the Intel
using messages on the front side bus.
3.2.3.22
Universal Serial Bus (USB) Controller
®
The Intel
ICH9R contains one EHCI USB 2.0 controller and can support four USB ports. The
USB controller moves data between main memory and up to four USB connectors. All ports
function identically and with the same bandwidth.
26
Intel® Server Boards S3200SH/S3210SH TPS
®
ICH9R Interface defined as segment
®
82541PI LAN
®
ICH9R
Revision 1.3

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