Intel S3210SHLX - Entry Server Board Motherboard Specification page 37

Intel® Server Boards S3200SH/S3210SH TPS
3.2.3.9 Real Time Clock (RTC)
The ICH9 contains a Motorola* MS146818A functionally compatible Real Time Clock with two
128 Byte banks of battery backed RAM. The RTC performs two key functions on the server
board:
•
Keeping track of time of day
•
Storing system configuration data even when the system is powered down.
The RTC operates on a 32.768 KHz crystal and a 3V lithium battery.
3.2.3.10 GPIO
The ICH9 contains 61 general purpose input/output. The General Purpose Inputs and Outputs
(GPIO) are provided for custom system design.
3.2.3.11 Enhanced Power Management
The ICH9 supports the Advanced Configuration and Power Interface, Version 2.0 (ACPI) that
provides power and thermal management. The ICH9 also supports the Manageability Engine
Power Management Support for new wake events from the MCH Management Engine.
The server board is fully compliant with the Advanced Configuration and Power Interface (ACPI)
specifications, Revision 2.0.
3.2.3.12 System Management Interface
The ICH9 on the server board functions as a SMBus host controller that allows the processor to
communicate with SMBus slaves. This interface is compatible with most I2C devices. The ICH9
also supports slave functionality. The SMBus logic exists in device 31: function 3 configuration
space.
3.2.3.13 Intel
The ICH9 integrates two thermal sensors that monitor the temperature within is die. Those
sensors are used to support the Intel
engine (ME) residing in the MCH and requires SPI flash to host the Intel
Additionally ICH9 integrates four fan speed TACH sensors and three fan speed controllers,
PWMs. This allows the monitoring and controlling of up to four fans on the system. The ICH9
implements a single wire Simple Serial Transport (SST) bus that allows connection of up to five
SST thermal or voltage monitoring devices. The ICH9 also support the Platform Environmental
Control Interface (PECI) that provides access to the CPU thermal data.
The server board does not support ME or Intel
through Integrated BMC firmware.
3.2.3.14 Serial Peripheral Interface (SPI)
The Serial Peripheral Interface (SPI) is a 4-pin interface that provides a potentially lower-cost
alternative for the system flash versus the Firmware Hub on the LPC Bus. The ICH9 supports
Revision 1.3
®
Quiet System Technology (Intel
® QST. The Intel
®
QST)
® QST is controlled by the management
® QST. Fan speed control is accomplished
Functional Architecture
® QST firmware.
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