Related Manuals for Intel S3200SHV - Entry Server Board Motherboard
Summary of Contents for Intel S3200SHV - Entry Server Board Motherboard
- Page 1 Intel Server Boards S3200SH/S3210SH ® Technical Product Specification Intel Order Number: E14960-009 Revision 1.8 May, 2010 Enterprise Platforms and Services Division...
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Page 2: Revision History
The Intel Server boards Snow Hill family may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. -
Page 3: Table Of Contents
Intel® Server Boards S3200SH/S3210SH TPS Table of Contents Table of Contents 1. Introduction .......................... 1 Chapter Outline......................1 Server Board Use Disclaimer .................. 1 2. Server Board Overview ......................2 Server Board Feature Set..................2 Server Board Layout....................10 2.2.1 Server Board Mechanical Drawings .............. - Page 4 Table of Contents Intel® Server Boards S3200SH/S3210SH TPS BIOS Setup Utility ....................44 4.3.1 Operation ....................... 44 4.3.2 Server Platform Setup Screens ................47 Loading BIOS Defaults ..................75 Multiple Boot Blocks ....................75 Recovery Mode...................... 75 ® Intel Matrix Storage Manager................76 Intel ®...
- Page 5 Intel® Server Boards S3200SH/S3210SH TPS Table of Contents Miscellaneous Headers and Connectors ............... 92 6.7.1 Back Panel I/O Connectors ................... 92 6.7.2 Chassis Intrusion Header ..................93 6.7.3 HDD Active LED Header ..................93 6.7.4 IPMB ........................93 6.7.5 HSBP ........................93 6.7.6...
- Page 6 Table of Contents Intel® Server Boards S3200SH/S3210SH TPS Glossary ............................ 113 Reference Documents......................116 Revision 1.8 Intel Order Number: E14960-009...
- Page 7 Intel® Server Boards S3200SH/S3210SH TPS List of Figures List of Figures Figure 1. Intel ® Server Board S3210SHLX Diagram..............7 Figure 2. Intel ® Server Board S3210SHLC Diagram..............8 Figure 3. Intel ® Server Board S3200SH-L/S3200SH-V SKU Diagram.......... 9 ®...
- Page 8 ® Figure 39. Intel Server Board S3200SH Mechanical Drawing ..........109 ® Figure 40. Pedestal Mount I/O Shield Mechanical Drawing for the Intel Server Board S3200SH- V ............................110 ® Figure 41. Pedestal Mount I/O Shield Mechanical Drawing for Intel Server Boards S3200SH- L/S3210SH-LX ........................
- Page 9 Intel® Server Boards S3200SH/S3210SH TPS List of Tables List of Tables ® Table 1. Intel Server Board S3210SHLX Board SKU Layout Reference ........7 Table 2. Intel ® Server Board S3210SHLC Layout Reference ............8 Table 3. Processor Support Matrix ..................... 16 Table 4.
- Page 10 List of Tables Intel® Server Boards S3200SH/S3210SH TPS Table 34. Setup Utility — CDROM Order Fields ................. 69 Table 35. Setup Utility — Floppy Order Fields................70 Table 36. Setup Utility — Network Device Order Fields ............. 70 Table 37. Setup Utility — BEV Device Order Fields ..............71 Table 38.
- Page 11 Intel® Server Boards S3200SH/S3210SH TPS List of Tables Table 69. Turn On/Off Timing ....................100 Table 70. Transient Load Requirements................... 101 Table 71. AC Line Sag Transient Performance ................ 101 Table 72. AC Line Surge Transient Performance ..............102 Table 73. Product Certification Markings .................. 105 Revision 1.8...
- Page 12 List of Tables Intel® Server Boards S3200SH/S3210SH TPS < This page intentionally left blank. > Revision 1.8 Intel Order Number: E14960-009...
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Page 13: Introduction
It is the responsibility of the system integrator who chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of airflow required for their specific application and environmental conditions. -
Page 14: Server Board Overview
(PCBs) with features designed to support the entry server market. Server Board Feature Set ® All board SKUs are based on the Intel 3200/3210 Chipset Supports processors in LGA775 package 800/1066/1333 MHz Front Side Bus (FSB) speed Four DDR2 667/800MHz unbuffered DIMM memory sockets with or without ECC ®... - Page 15 Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview ® Winbond* PC8374L super I/O chip interfaced to the Intel ICH9R through LPC supports the following: o PS/2 keyboard/mouse o Floppy disk drive (FDD) o Six SATA II connectors Five USB 2.0 ports: two ports on USB/LAN combo connectors at the rear of the server board, two ports via on-board headers, and one port on an internal vertical connector ®...
- Page 16 One Gigabit Ethernet device (82541PI, MAC + PHY) connect to PCI interfaces ® on the Intel ICH9R ® o One Gigabit Ethernet PHY (82566DM) connected to the Intel ICH9R through GLC/LCI interface (not in V board SKU) o Two 10/100/1000 Base-TX interfaces through RJ-45 connectors with integrated magnetics...
- Page 17 Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview System Management o Processor on die temperature monitoring through PECI (Platform Environment Control Interface) o Board temperature measurement o Fan speed monitoring and control o Voltage monitoring o IPMI-based (Intelligent Platform Management Interface) server management...
- Page 18 Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS o One 4-pin SATA RAID Key o One 2-pin intrusion detection BIOS o EFI BIOS Power Management o Support for Power Management of all capable components o ACPI-compliant motherboard and BIOS o Sleep Switch and dual mode LED indicator Manufacturing o Surface mount technology.
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Page 19: Figure 1. Intel
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview X W V U AF002303 ® Figure 1. Intel Server Board S3210SHLX Diagram ® Table 1. Intel Server Board S3210SHLX Board SKU Layout Reference Description Description Description PCI-X (64-bit/133 MHz) Slot 1... -
Page 20: Figure 2. Intel
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS The following figure shows the board layout of the LC board SKU. A letter identifies each connector and major component (shown in Table 2). AF002304 ® Figure 2. Intel Server Board S3210SHLC Diagram ®... -
Page 21: Figure 3. Intel
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview The following figure shows the board layout of the Intel ® Server Boards S3200SHL/S3200SHV. A letter identifies each connector and major component (shown in Table 3). AF002310 ® Figure 3. Intel Server Board S3200SH-L/S3200SH-V SKU Diagram ®... -
Page 22: Server Board Layout
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS Server Board Layout ® Figure 4. Intel Server Board S3210SHLC Revision 1.8 Intel Order Number: E14960-009... -
Page 23: Server Board Mechanical Drawings
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview 2.2.1 Server Board Mechanical Drawings ® Figure 5. Intel Server Board S3210SHLX – Hole and Component Positions Revision 1.8 Intel Order Number: E14960-009... -
Page 24: Figure 6. Intel ® Server Boards S3210Shlc/S3200Shl/S3200Shv - Hole And Component
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS ® Figure 6. Intel Server Boards S3210SHLC/S3200SHL/S3200SHV – Hole and Component Positions Revision 1.8 Intel Order Number: E14960-009... -
Page 25: Functional Architecture
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Functional Architecture This chapter provides a high-level description of the functionality associated with the architectural blocks that make up the Intel ® Server Boards S3200SH/S3210SH. ® Figure 7. Intel Server Boards S3200SH/S3210SH LC/L/V SKU–Block Diagram Revision 1.8... -
Page 26: Figure 8. Intel Server Systems S3200Sh/S3210Sh Lx Sku-Block Diagram
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS ® Figure 8. Intel Server Systems S3200SH/S3210SH LX SKU–Block Diagram Revision 1.8 Intel Order Number: E14960-009... -
Page 27: Processor Sub-System
The processors built on 65 nm (nanometer) and 45 nm process technology in the 775-land package use Flip-Chip Land Grid Array (FC-LGA4) package technology, and plug into a 775- ® land LGA socket, referred to as the Intel LGA775 socket. The processors in the 775-land package are based on the same core micro-architecture. They... -
Page 28: Intel 3200/3210 Chipset
Intel 3200/3210 Chipset ® ® The server board is designed around the Intel 3200/3210 Chipset. The chipset provides an integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI Express*). The chipset consists of three primary components. -
Page 29: Table 4. Segment F Connections
An outbound request queue for subsequent forwarding to one of the PCI Express* or PCI buses ® The MCH also accepts inbound requests from the Intel ICH9R. The MCH is responsible for generating the appropriate controls to control data transfer to and from memory. -
Page 30: Table 5. Supported Ddr2 Modules
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Lane Device Lane 0~7 Slot 6 (PCI Express* x16 with 8 Lanes layout) 3.2.1.2 MCH Memory Sub-System Overview The MCH supports a 72-bit wide memory sub-system that can support a maximum of 8 GB of DDR2 memory using 2 GB DIMMs. -
Page 31: Pci-X Hub (Lx Board Sku Only)
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Supports ECC or non-ECC DIMMs. Different memory technologies (size and density) can be used. Single Channel Mode (either channel can be used): DIMM slots (within the same channel) may be populated in any order. -
Page 32: Intel Ich9R: I/O Controller Hub 9R
® the Intel ICH9. DMI is a x4 link that mostly adheres to the PCI Express* specification. ® Deviations of the DMI from standard PCI Express* specifications are described in the Intel ICH9 CSPEC. 3.2.3.2 Controller Link (M-Link) Controller Link is the name given to the interconnect that connects the north bridge (MCH) to ®... - Page 33 ® routing logic of the Intel ICH9 determines whether a USB port is controlled by one of the UHCI ® controllers or by the EHCI controller. The Intel ICH9 also implements a USB 2.0 based debug port. 3.2.3.9 Real Time Clock (RTC) ®...
- Page 34 ® Quiet System Technology (Intel QST). Intel ® QST is controlled by the management engine (ME) residing in the MCH and requires SPI flash to host the Intel ® firmware. ® The Intel ICH9 integrates four fan speed TACH sensors and three fan speed controllers, PWMs.
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Page 35: Table 8. Boot Bios Destination Selection
SPI device prior to de-assertion of reset to the Manageability Engine and the Host system. ® GNT# and SPI_CS1# are both pulled-up with soft resistors internal to the Intel ICH9. The default BIOS flash without external straps is the FWH. For manufacturing or debugging support, the BIOS cycles may also be directed to the PCI bridge via the same external flash. - Page 36 ICH9 Interfaces on the Server Board ® ® The server board does not support the following interfaces in the Intel ICH9: 1. AC’97 2.3 Controller – ICH9 integrates an Audio Codec ’97 Component Specifications, Version 2.3 controller that can be used to attach an Audio Codec (AC), a Modem Codec (MC), an Audio/Modem Codec (AMC), or a combination of ACs and a single MC ®...
- Page 37 3.2.3.18 ® One 32-bit PCI bus segment is directed through the Intel ICH9R Interface defined as segment ® A. This PCI Segment A supports two PCI connectors and one embedded Intel 82541PI LAN controller. ® The Intel ICH9R does not contain a PATA device controller in the chipset; therefore, SATA interface CD-ROM/DVD-ROMs are recommended for use with the server board.
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Page 38: Memory Sub-System
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Memory Sub-System The server board supports up to four DIMM slots for a maximum memory capacity of 8 GB. The DIMM organization is x72, which includes eight ECC check bits. The memory interface runs at 533/667 MTs. -
Page 39: Figure 9. Memory Bank Label Definition
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Table 10. Memory Bank Labels and DIMM Population Order Location DIMM Label Channel Population Order J8J1 (DIMM_1A) J8J2 (DIMM_2A) J9J1 (DIMM_1B) J9J2 (DIMM_2B) Figure 9. Memory Bank Label Definition Revision 1.8 Intel Order Number: E14960-009... -
Page 40: Memory Dimm Support
The board supports unbuffered (not registered) DDR2 667/800 ECC or non-ECC DIMMs operating at 667/800 MT/s. Note: Only DIMMs tested and qualified by Intel or a designated memory test vendor are supported on this board. All DIMMs are supported by design, but only fully qualified DIMMs are supported on the board. -
Page 41: Table 12. Pci Bus Segment Characteristics
ICH9R and one PCI bus master (NIC). All ® PCI masters must arbitrate for PCI access using resources supplied by the Intel ICH9R. The host bridge PCI interface (ICH9R) arbitration lines REQx* and GNTx* are a special case in that they are internal to the host bridge. -
Page 42: Interrupt Routing
(INTA, INTB, INTC, INTD, INTE, INTF, INTG, INTH for PCI bus ® and PXIRQ0, PXIRQ1, PXIRQ2, PXIRQ3 for PCI-X bus) is connected. The Intel ICH9R I/O APIC exists on the I/O APIC bus with the processor. -
Page 43: Table 16. Interrupt Definitions
For APIC mode, the server board interrupt architecture incorporates three Intel I/O APIC ® devices to manage and broadcast interrupts to local APICs in each processor. The Intel APICs monitor each interrupt on each PCI device including PCI slots in addition to the ISA compatibility interrupts IRQ (0-15). - Page 44 Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.4.3 PCI Error Handling The PCI bus defines two error pins, PERR# and SERR#, for reporting PCI parity errors and system errors, respectively. In the case of PERR#, the PCI bus master has the option to retry the offending transaction or report it using SERR#.
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Page 45: Figure 10. Interrupt Routing Diagram
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture ® Intel ICH9R IOAPIC 0 DMI INTERFACE IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 ® IRQ9 Intel IRQ10 ® ICH9R Intel IRQ11 IRQ12 ICH9R IRQ13 8259PIC IRQ14 IRQ15 IRQ16 IRQ17 IRQ18... -
Page 46: Figure 11. Intel Ich9R Interrupt Routing Diagram
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Super I/O Timer Keyboard Cascade Serial Port2/ISA SERIRQ Serial Port1/ISA SERIRQ Floppy/ISA SCI/ISA Mouse/ISA Coprocessor Error P IDE/ISA Not Used PIRQA# PIRQB# ® Intel 82541PI NIC PIRQC# PIRQD# PIRQE# Slot 1 and 2 INTC... -
Page 47: Figure 12. Pxh-V Interrupt Routing Diagram
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture PCI-X slot 6 INTD# PA IRQ0 PCI-X slot 6 INTA# PA IRQ1 PCI-X slot 6 INTC# PA IRQ2 PCI-X slot 6 INTB# PA IRQ3 PCI-X slot 5 INTD# PA IRQ4 PCI-X slot 5 INTA#... -
Page 48: Bmc Controller
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS BMC Controller The Integrated Baseboard Management Controller (Integrated BMC) is a highly integrated single-chip solution, integrating several devices typically found on servers. The Integrated BMC is mainly targeted at next generation servers and provides a highly-integrated server class product. - Page 49 Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Eight Fan Tach Inputs Four Pulse Width Modulators (PWM) Chassis Intrusion Logic with battery backed general purpose register LED support with programmable blink rate control Programmable IO Port snooping, which can be used to snoop on Port 80h...
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Page 50: Pci Express* To Pci-X Bridge 6702Pxh (Pxh-V) (Lx Board Sku Only)
6702PXH 64-bit PCI Hub is a peripheral chip that performs PCI bridging functions ® between the PCI Express* interface and the PCI bus. The Intel 6702PXH 64-bit PCI Hub contains a single PCI bus interface that can be configured to operate in PCI (33 or 66 MHz) or PCI-X Mode 1 (66, 100, or 133 MHz). -
Page 51: Gige Controller 82541Pi
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture GigE Controller 82541PI ® The Intel 82541 Gigabit Ethernet Controller is a single, compact component with integrated Gigabit Ethernet Media Access Controller (MAC) and Physical Layer (PHY) function. This device interfaces with the ICH9 using PCI 32 bit/33MHz. The server board uses this device along with the integrated ICH9 MAC and external 82566 PHY to provide two Gigabit Ethernet Ports. - Page 52 Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS controller is disabled by default in BIOS Setup when an off-board video adapter is detected in either the PCI Express* or PCI slots. Revision 1.8 Intel Order Number: E14960-009...
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Page 53: Table 17. Video Modes
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture 3.11.1.1 Video Modes Table 17. Video Modes 2D Mode Refresh Rate (Hz) 2D Video Mode Support 8 bpp 16 bpp 24 bpp 32 bpp 640x480 60, 72, 75, 90, 100 Supported Supported Supported... -
Page 54: 3.12 Replacing The Back-Up Battery
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.12 Replacing the Back-Up Battery The lithium battery on the server board powers the RTC for up to ten years in the absence of power. When the battery starts to weaken, it loses voltage, and the server settings stored in CMOS RAM in the RTC (for example, the date and time) may be wrong. -
Page 55: System Bios
The string is formatted as follows: BoardFamilyID.OEMID.MajorRev.MinorRev.BuildID.BuildDateTime Where: BoardFamilyID = String name for this board family OEMID = Three-character OEM ID. “86B” is used for Intel server boards MajorRev = Two decimal digits MinorRev = Two decimal digits BuildID = Four decimal digits... -
Page 56: Logo / Diagnostic Window
The diagnostic screen consists of the following information BIOS ID Total memory detected (total size of all installed DIMMs) Processor information (Intel branded string, speed, and number of physical processors identified) Types of input devices (keyboard, mouse, and so forth) detected if plugged in (PS/2... -
Page 57: Table 18. Bios Setup Page Layout
Entering BIOS Setup You start the BIOS Setup by pressing <F2> during boot time when the OEM (Original Equipment Manufacturer) or Intel logo displays. When Quiet Boot is disabled, the message “press <F2> to enter setup” displays on the diagnostics screen. -
Page 58: Table 19. Bios Setup: Keyboard Command Bar
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Table 19. BIOS Setup: Keyboard Command Bar Option Description <Enter> Execute The <Enter> key activates sub-menus when the selected feature is a sub-menu, or Command displays a pick list if a selected option has a value field, or selects a sub-field for multi-valued features like time and date. -
Page 59: Server Platform Setup Screens
System BIOS Intel® Server Boards S3200SH/S3210SH TPS 4.3.2 Server Platform Setup Screens The following sections describe the screens available for the configuration of a server platform. The tables in these sections describe the contents of each screen. These tables follow these... -
Page 60: Figure 13. Setup Utility - Main Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Advance Main Security Server Management Boot Options Boot Manager Logged in as <Administrator or User> <Platform Identification String> Platform ID S3200X38.86B.xx.yy.zzzz BIOS Version <MM/DD/YYYY> Build Date Processor ® ® Intel Xeon Core Frequency <Current Operating Frequency>... -
Page 61: Table 20. Setup Utility - Main Screen Fields
BIOS build date. Processor <ID string from the Information only. Displays the Processor> Intel processor name and the CPU speed. This information is retrieved from the processor. Core Frequency Information only. Displays the current speed of the boot processor in GHz or MHz. -
Page 62: Figure 14. Setup Utility - Advanced Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Setup Item Options Help Text Comments System Date [Day of week System Date has configurable MM/DD/YYYY] fields for Month, Day, and Year. Use [Enter] or [Tab] key to select the next field. Use [+] or [-] key to modify the selected field. -
Page 63: Figure 15. Setup Utility - Processor Configuration Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Table 21. Setup Utility — Advanced Screen Display Fields Setup Item Options Help Text Processor Configuration View/Configure processor information and settings. Memory Configuration View/Configure memory information and settings. SATA Controller Configuration View/Configure SATA Controller information and settings. -
Page 64: Table 22. Setup Utility - Processor Configuration Screen Fields
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Table 22. Setup Utility — Processor Configuration Screen Fields Setup Item Options Help Text Comments Processor Family Information only. Identifies the processor family or generation. Core Frequency Information only. Frequency at which processors currently run. -
Page 65: Figure 16. Setup Utility - Memory Configuration Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS To access this screen from the Main screen, select Advanced | Memory. Advanced Memory Configuration Total Memory <Total Physical Memory Installed in System> Effective Memory <Total Effective Memory> Current Configuration < Single Channel/Dual Channel >... - Page 66 Intel® Server Boards S3200SH/S3210SH TPS System BIOS Setup Item Options Comments Current Configuration Information only. Displays one of the following: Dual Channel: System memory is configured for optimal performance and efficiency. Single Channel: System memory is functioning in a special, reduced efficiency mode.
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Page 67: Figure 17. Setup Utility - Ata Controller Configuration Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Advanced SATA Controller Configuration Onboard SATA Controller Enabled / Disabled Configure SATA as IDE / AHCI/ RAID ► SATA Port 0 Not Installed/<Drive Info.> ► SATA Port 1 Not Installed/<Drive Info.> ► SATA Port 2 Not Installed/<Drive Info.>... -
Page 68: Table 24. Setup Utility - Ata Controller Configuration Screen Fields
When RAID is selected, no SATA [RAID] - SATA controller will be drive information is displayed. ® in RAID mode and the Intel RAID for Serial ATA option ROM will execute. [IDE] – The SATA drives will be set to work as independent... -
Page 69: Figure 18. Setup Utility - Serial Port Configuration Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Advanced Serial Port Configuration Serial A Enable Enabled/Disabled Address 3F8h / 2F8h / 3E8h / 2E8h 3 or 4 Serial B Enable Enabled/Disabled Address 3F8h / 2F8h / 3E8h / 2E8h 3 or 4 Figure 18. -
Page 70: Figure 19. Setup Utility - Usb Controller Configuration Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Advanced USB Configuration Detected USB Devices <Total USB Devices in System> USB Controller Enabled / Disabled Legacy USB Support Enabled / Disabled / Auto USB Mass Storage Device Configuration Device Reset timeout 10 sec / 20 sec / 30 sec / 40 sec Storage Emulation <Mass storage devices one line/device>... -
Page 71: Table 26. Setup Utility - Usb Controller Configuration Screen Fields
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Table 26. Setup Utility — USB Controller Configuration Screen Fields Setup Item Options Help Text Comments Detected USB Information only: Shows number of Devices connected USB devices USB Controller [Enabled] - All onboard USB controllers will be turned on Enabled and accessible by the OS. -
Page 72: Figure 20. Setup Utility - Pci Configuration Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Advanced PCI Configuration Dual Monitor Video Enabled / Disabled Onboard NIC ROM Enabled / Disabled NIC 1 MAC Address <MAC #> NIC 2 MAC Address <MAC #> Figure 20. Setup Utility — PCI Configuration Screen Display Table 27. -
Page 73: Figure 21. Setup Utility - Security Configuration Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Main Advanced Security Server Management Boot Options Boot Manager Administrator Password Status <Installed/Not Installed> User Password Status <Installed/Not Installed> Set Administrator Password [1234abcd] Set User Password [1234abcd] Front Panel Lockout Enabled/Disabled Figure 21. Setup Utility — Security Configuration Screen Display Table 28. -
Page 74: Figure 22. Setup Utility - Server Management Configuration Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS 4.3.2.4 Server Management Screen The Server Management screen provides fields to configure several server management features such as enabling FRB-2, clearing the system event log, and so forth. It also provides an access point to the screens for configuring console redirection and displaying system information. - Page 75 Disabled before the timer expires, the BMC will reset the system and an error will be logged. Requires OS support or Intel Management Software. O/S Boot Watchdog If the OS watchdog timer is enabled, this is the system Power Off Timer Policy action taken if the watchdog timer expires.
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Page 76: Figure 23. Setup Utility - Console Redirection Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Server Management Console Redirection Console Redirection Disabled / Serial A / Serial B Flow Control None / RTS/CTS Baud Rate 9.6k / 19.2k / 38.4k / 57.6k / 115.2k Terminal Type PC-ANSI / VT100 / VT100+ / VT-UTF8... -
Page 77: Figure 24. Setup Utility - Server Management System Information Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS 4.3.2.5 Server Management System Information Screen The Server Management System Information screen provides a place to see part numbers, serial numbers, and firmware revisions. To access this screen from the Main screen, select Server Management. Select the System Information option from the Server Management screen. -
Page 78: Figure 25. Setup Utility - Boot Options Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS 4.3.2.6 Boot Options Screen The Boot Options screen displays any bootable media encountered during POST and allows the user to configure the boot device. To access this screen from the Main screen, select Boot Options. -
Page 79: Figure 26. Setup Utility - Hard Disk Order Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Table 32. Setup Utility — Boot Options Screen Fields Setup Item Help Text Comments Boot Timeout The number of seconds BIOS will After entering the preferred pause at the end of POST to allow the... -
Page 80: Table 33. Setup Utility - Hard Disk Order Fields
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Table 33. Setup Utility — Hard Disk Order Fields Setup Item Options Help Text Hard Disk #1 Available hard Set hard disk boot order by selecting the boot disks option for this position. -
Page 81: Figure 27. Setup Utility - Cdrom Order Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS 4.3.2.6.2 CDROM Order Screen The CDROM Order screen provides a way to control CD-ROM devices. To access this screen from the Main screen, select Boot Options | CDROM Order. Boot Options CDROM <Available CDROM devices>... -
Page 82: Figure 29. Setup Utility - Network Device Order Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS Table 35. Setup Utility — Floppy Order Fields Setup Item Options Help Text Floppy Disk #1 Available floppy Set floppy disk boot order by selecting the disk boot option for this position. Floppy Disk #2... -
Page 83: Figure 30. Setup Utility - Bev Device Order Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS 4.3.2.6.5 BEV Device Order Screen The BEV Device Order screen provides a way to control the BEV (Bootstrap Entry Vector) bootable devices. To access this screen from the Main screen, select Boot Options | BEV Device Order. -
Page 84: Figure 31. Setup Utility - Boot Manager Screen Display
Intel® Server Boards S3200SH/S3210SH TPS System BIOS 4.3.2.7 Boot Manager Screen The Boot Manager screen displays a list of devices available to boot from and allows the user to select a boot device for this boot. To access this screen from the Main screen, select Boot Manager. -
Page 85: Figure 33. Setup Utility - Exit Screen Display
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Table 39. Setup Utility — Error Manager Screen Fields Setup Item Options Help Text Comments Displays System Errors Information only. Displays errors that occurred during this POST. 4.3.2.9 Exit Screen The Exit screen allows the user to choose to save or discard the configuration changes made on the other screens. - Page 86 FRUSDR update package. The FRUSDR manages the system fans to work at the speed the customer inputs. Intel will publish a third party chassis fan speed control white paper to guide customers on how to edit the master.cfg file to have fan speed control functions for the third party chassis. Without...
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Page 87: Loading Bios Defaults
System BIOS Intel® Server Boards S3200SH/S3210SH TPS Loading BIOS Defaults Different mechanisms exist for resetting the system configuration to the default values. When a request to reset the system configuration is detected, the BIOS loads the default system configuration values during the next POST. The request to reset the system to the defaults can... -
Page 88: Intel Matrix Storage Manager
Embedded Server RAID Technology II Support ® ® The onboard storage capability of this server board includes support for Intel Embedded Server RAID Technology, which provides three standard software RAID levels: data striping (RAID Level 0), data mirroring (RAID Level 1), and data striping with mirroring (RAID Level 10). -
Page 89: Error Reporting And Handling
Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling Error Reporting and Handling This chapter defines the following error handling features: Error Handling and Logging Error Messages and Beep Codes Error Handling and Logging This section defines how errors are handled by the system BIOS. In addition, this section describes error-logging techniques and defines error beep codes. -
Page 90: Error Logging Via Smi Handler
Error Reporting and Handling Intel® Server Boards S3200SH/S3210SH TPS 5.1.2 Error Logging via SMI Handler The SMI (System Management Interrupt) handler manages and logs system level events. The SMI handler pre-processes all system errors, even those that are normally considered to generate an NMI (Non-maskable interrupt). -
Page 91: Table 42. Smbios Type 15 Event Log Record Format
Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling Table 42. SMBIOS Type 15 Event Log record format Offset Name Length Description EventType Byte Specifies the “Type” of event noted in an event-log entry as defined in the table. Length... -
Page 92: Error Messages And Error Codes
For information on the EFI_STATUS_CODE_TYPE and EFI_STATUS_CODE_VALUE definitions, refer to the “Intel Platform Innovation Framework for EFI Status Codes Specification”, version 0.92. The errors also display on the BIOS Setup screen in the Server Management / View EventLog... -
Page 93: Post Code Checkpoints
Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling Green bits = 1100b = Ch Since the red bits correspond to the upper nibble and the green bits correspond to the lower nibble, the two are concatenated to be ACh. - Page 94 Error Reporting and Handling Intel® Server Boards S3200SH/S3210SH TPS Diagnostic LED Decoder Description Checkpoint G=Green, R=Red, A=Amber 0x26h Optimizing memory controller settings 0x27h Initializing memory, such as ECC init 0x28h Testing memory PCI Bus 0x50h Enumerating PCI buses 0x51h Allocating resources to PCI buses...
- Page 95 Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling Diagnostic LED Decoder Description Checkpoint G=Green, R=Red, A=Amber 0xB2h Detecting presence of a fixed media device (IDE hard drive detection, and so forth) 0xB3h Enabling / configuring a fixed media device...
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Page 96: Post Error Messages And Handling
Error Reporting and Handling Intel® Server Boards S3200SH/S3210SH TPS Diagnostic LED Decoder Description Checkpoint G=Green, R=Red, A=Amber 0xF5h Exiting Sleep state 0xF8h Operating system has requested EFI to close boot services (ExitBootServices ( ) has been called) 0xF9h Operating system has switched to virtual address mode... -
Page 97: Post Error Beep Codes
Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling 5.2.4 POST Error Beep Codes The following table lists POST error beep codes. Prior to system video initialization, the BIOS uses these beep codes to inform users of error conditions. The beep code is followed by a user- visible code on the POST progress LEDs. -
Page 98: Connectors And Jumper Blocks
Intel® Server Boards S3200SH/S3210SH TPS Connectors and Jumper Blocks Connectors and Jumper Blocks Power Connectors 6.1.1 Main Power Connector The following table defines the pin-out of the main power connector. Table 48. Power Connector Pin-out (J4G1) Signal 18 AWG Color... -
Page 99: Intel Riser Card For L Sku
Server Board S3200SH-L has a PCI Express* x16 to PCI Express* x16 riser card. ® This riser card is designed to be populated with PCI Express* x16 slot on the Intel Server Board S3200SH-L. The physical layout to the PCI Express* x16 slot on the riser card is PCI Express* x8. -
Page 100: I/O Connectors
Intel® Server Boards S3200SH/S3210SH TPS Connectors and Jumper Blocks I/O Connectors 6.5.1 VGA Connector The following table details the pin-out of the VGA connector. This connector is stacked with the COM1 connector. Table 52. VGA Connector Pin-out (J8B1) Signal Name... -
Page 101: Sata Connectors
Connectors and Jumper Blocks Intel® Server Boards S3200SH/S3210SH TPS ® Table 54. NIC1- Intel 82566E (10/100/1000) Connector Pin-out (J6B1) Signal Name Signal Name P2V5_NIC1 P3V3_AUX NIC1_MDI0_DP NIC1_LINK_0_N NIC1_MDI0_DN NIC1_LINK_2_N NIC1_MDI1_DP NIC1_MDI1_DN NIC1_MDI2_DP NIC1_MDI2_DN NIC1_MDI3_DP NIC1_MDI3_DN NIC1_LINK_1_N 6.5.3 SATA Connectors Table 55 lists the pin-out for the four SATA connectors. -
Page 102: Serial Port Connectors
Intel® Server Boards S3200SH/S3210SH TPS Connectors and Jumper Blocks Signal Name Signal Name FDR0# FDMTR1# Unused FDDIR FDSTEP# FDWDATA# FDWGATE# FDTRK0# Unused FLWP# FRDATA# FHDSEL# FDSKCHG# 6.5.5 Serial Port Connectors The server board provides one serial port. A standard, external DB9 serial connector is located on the back edge of the server board to supply a serial interface. -
Page 103: Keyboard And Mouse Connector
Connectors and Jumper Blocks Intel® Server Boards S3200SH/S3210SH TPS 6.5.6 Keyboard and Mouse Connector Two PS/2 ports are provided for a keyboard and a mouse. The following table details the pin-out of the PS/2 connectors. Table 58. Keyboard and Mouse PS/2 Connectors Pin-out (J9A1) -
Page 104: Fan Headers
Intel® Server Boards S3200SH/S3210SH TPS Connectors and Jumper Blocks A header on the server board provides an option to support two additional USB connectors. The following table details the pin-out of the header. Table 60. Optional USB Connection Header Pin-out (J1G1) -
Page 105: Chassis Intrusion Header
Chassis Intrusion Header ® A 1x2 pin header (J1B2) is used in chassis that support a chassis intrusion switch. The Intel ICH9R monitors this header. Table 62 shows the pin-out definition for this header. Table 62. Chassis Intrusion Header (J1B2) Pin-out... -
Page 106: Sata Sgpio
The CMOS Clear and Password Reset recovery features are designed so the desired operation can be achieved with minimal system down time. The usage procedure for these two features has changed from previous generation Intel server boards. The following procedure outlines the new usage model. -
Page 107: Bmc Force Update Procedure
Connectors and Jumper Blocks Intel® Server Boards S3200SH/S3210SH TPS 6.8.2 BMC Force Update Procedure When performing a standard BMC firmware update procedure, the update utility places the BMC into an update mode, allowing the firmware to load safely onto the flash device. In the... -
Page 108: Absolute Maximum Ratings
Intel® Server Boards S3200SH/S3210SH TPS Absolute Maximum Rating Absolute Maximum Ratings Operating the server board at conditions beyond those shown in the following table may cause permanent damage to the system. The table is provided for stress testing purposes only. -
Page 109: Design And Environmental Specifications
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS Design and Environmental Specifications Power Budget The following table shows the power consumed on each supply line for the server board that is configured with one processor (128W max). This configuration includes four 1 GB DDR2 DIMMs stacked burst at 70% max. -
Page 110: Power Supply Specifications
Intel® Server Boards S3200SH/S3210SH TPS Design and Environmental Specifications Power Supply Specifications This section provides power supply design guidelines for the server board, including voltage and current specifications, and power supply on/off sequencing characteristics. Table 67. Server Board Power Supply Voltage Specification... -
Page 111: Figure 37. Output Voltage Timing
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS The 5VSB output voltage rise time will be from 1.0ms to 25.0ms. Vout Vout Tvout_rise Tvout_off Tvout_on Figure 37. Output Voltage Timing Revision 1.8 Intel Order Number: E14960-009... -
Page 112: Figure 38. Turn On/Off Timing (Power Supply Signals)
Intel® Server Boards S3200SH/S3210SH TPS Design and Environmental Specifications Table 69. Turn On/Off Timing Item Description Units Tsb_on_delay Delay from AC being applied to 5VSB being within msec 1500 regulation. T ac_on_delay Delay from AC being applied to all output voltages being... -
Page 113: Dynamic Loading
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS 8.2.2 Dynamic Loading The output voltages should remain within limits specified for the step loading and capacitive loading specified in Table 70. The load transient repetition rate should be tested between 50Hz and 5 kHz at duty cycles ranging from 10%-90%. -
Page 114: Ac Line Fast Transient (Eft) Specification
Intel® Server Boards S3200SH/S3210SH TPS Design and Environmental Specifications Table 72. AC Line Surge Transient Performance AC Line Surge Duration Surge Operating AC Voltage Line Frequency Performance Criteria Continuous Nominal AC Voltages 50/60Hz No loss of function or performance. 0 to ½ AC... -
Page 115: Product Emc Compliance - Class A Compliance
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS 8.3.2 Product EMC Compliance – Class A Compliance Note: Legally, the product is required to comply with Class A emission requirements as it is intended for a commercial type market place. - Page 116 Design and Environmental Specifications RoHS (Restriction of Hazardous Substances Directive) Intel has a system in place to restrict the use of banned substances in accordance with the European Directive 2002/95/EC. Compliance is based on declaration that materials banned in the RoHS Directive are either (1) below all applicable substance threshold limits, or (2) an approved/pending RoHS exemption applies.
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Page 117: Product Regulatory Compliance Markings
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS 8.3.4 Product Regulatory Compliance Markings This product is marked with the following Product Certification Markings: Table 73. Product Certification Markings Regulatory Compliance Region Marking UL Mark USA/Canada E139761 CE Mark Europe... -
Page 118: Electromagnetic Compatibility Notices
Intel® Server Boards S3200SH/S3210SH TPS Design and Environmental Specifications Electromagnetic Compatibility Notices 8.4.1 FCC (USA) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. -
Page 119: Ices-003 (Canada)
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS 8.4.2 ICES-003 (Canada) Cet appareil numérique respecte les limites bruits radioélectriques applicables aux appareils numériques de Classe B prescrites dans la norme sur le matériel brouilleur: “Appareils Numériques”, NMB-003 édictée par le Ministre Canadian des Communications. -
Page 120: Korean Compliance (Rrl)
English translation of the notice above: Type of Equipment (Model Name): On License and Product Certification No.: On RRL certificate. Obtain certificate from local Intel representative Name of Certification Recipient: Intel Corporation Date of Manufacturer: Refer to date code on product Manufacturer/Nation: Intel Corporation/Refer to country of origin marked on product Revision 1.8... -
Page 121: Mechanical Specifications
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS Mechanical Specifications ® The following figure shows the Intel Server Board S3200SH mechanical drawing. An updated version of this drawing will appear in a future revision of this document. ® Figure 39. Intel Server Board S3200SH Mechanical Drawing Revision 1.8... -
Page 122: Figure 40. Pedestal Mount I/O Shield Mechanical Drawing For The Intel ® Server Board S3200Sh- V
Server Board S3200SH-LX/LC share the same ® I/O shield, and Intel Server Board S3200SH-V employs a separate I/O shield. ® Figure 40. Pedestal Mount I/O Shield Mechanical Drawing for the Intel Server Board S3200SH-V Revision 1.8 Intel Order Number: E14960-009... -
Page 123: Figure 41. Pedestal Mount I/O Shield Mechanical Drawing For Intel Server Boards S3200Sh
Design and Environmental Specifications Intel® Server Boards S3200SH/S3210SH TPS ® Figure 41. Pedestal Mount I/O Shield Mechanical Drawing for Intel Server Boards S3200SH- L/S3210SH-LX Revision 1.8 Intel Order Number: E14960-009... -
Page 124: Hardware Monitoring
Intel® Server Boards S3200SH/S3210SH TPS Hardware Monitoring Hardware Monitoring Chassis Intrusion The server board supports a chassis security feature that detects removal of the chassis cover. For the chassis intrusion circuit to function, the chassis’ power supply must be connected to AC power. -
Page 125: Glossary
Intel® Server Boards S3200SH/S3210SH TPS Glossary Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (for example, “82460GX”) with alpha entries following (for example, “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms following. - Page 126 Intel® Server Boards S3200SH/S3210SH TPS Glossary Term Definition Interrupt Request In-target probe 1024 bytes Keyboard Controller Style 32.768 KHz Local area network Logical Block Address Liquid crystal display Low pin count Least Significant Bit 1024 KB Multi-Bit Error milliseconds Most Significant Bit...
- Page 127 Intel® Server Boards S3200SH/S3210SH TPS Glossary Term Definition System event log SERIRQ Serialized Interrupt Requests SERR System Error Server Management Server management interrupt. SMI is the highest priority non-maskable interrupt System Management Mode System Management Software SNMP Simple Network Management Protocol...
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Page 128: Revision
Intel® Server Boards S3200SH/S3210SH TPS Reference Documents Reference Documents Refer to the following documents for additional information: ® Intel S3200 Server Board Family Datasheet ® Intel 3200 Series Chipset Memory Controller Hub Datasheet. ® Intel ICH9 I/O Controller Hub Datasheet.