Error Reporting And Handling; Error Handling And Logging; Error Sources And Types; Table 38. Event List - Intel S3000PT - Server Board Motherboard Specification

Error Reporting and Handling

6. Error Reporting and Handling
This chapter defines the following error handling features:

Error Handling and Logging

Error Messages and Beep Codes
6.1 Error Handling and Logging
This section defines how errors are handled by the system BIOS . In addition, error-logging
techniques are described and beep codes for errors are defined.
6.1.1

Error Sources and Types

One of the major requirements of server management is to correctly and consistently handle
system errors. System errors that can be enabled and disable d individually or as a group can
be categorized as follows:
PCI bus errors
Memory single- and multi-bit errors
Errors detected during POST, logged as POST errors
The event list that would be logged is as follows:
Event Name
Processor thermal trip of last boot
Memory channel A Multi -bit ECC
error
Memory channel A Si ngle-bit ECC
error
Memory channel B Multi-bit ECC
error
Memory channel B Single-bit ECC
error
CMOS battery failure
CMOS checksum error
CMOS time not set
Keyboard not found
Memory size decrease
Chassis intrusion detected
Bad SPD tolerance
Revision 1.3

Table 38. Event List

Description
Processor thermal trip happened on
last boot.
Multi-bit ECC error happened on
DIMM channel A.
Single-bit ECC error happened on
DIMM channel A.
Multi-bit ECC error happened on
DIMM channel B.
Single-bit ECC error happened on
DIMM channel B.
CMOS battery failure or CMOS clear
jumper is set to clear CMOS.
CMOS data corrupted
CMOS time is not set
PS/2 KB is not found du ring POST
Memory size is decreased compared
with last boot
Chassis is open
Some fields of the DIMM SPD may
not be supported, but could be
tolerated by the Memory Reference
Code.
Intel® Server Board S3000PT TPS
When Error Is Caught
POST
POST / Runtime
POST / Runtime
POST / Runtime
POST / Runtime
POST
POST
POST
POST
POST
POST
POST
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