Part 3.12: JTAG Interface
The development board reserves a JTAG interface for downloading FPGA
programs or firmware to FLASH. In order to prevent damage to the FPGA chip
caused by hot plugging, we added a protection diode to the JTAG signal to
ensure that the signal voltage is within the range accepted by the FPGA to
avoid damage to the FPGA.
Be careful not to hot plug the JTAG cable
Figure 3-12-2: JTAG Interface on the Carrier Board
Part 3.13: keys
The AX7A035 FPGA carrier board contains five user keys RESET,
KEY1~KEY4, and all the keys are connected to the normal IO of the FPGA.
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ARTIX-7 FPGA Development Board AX7A035 User Manual
Figure 3-12-1: JTAG Interface Schematic
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