Part 2.3: Active Differential Crystal - Alinx AX7A035 User Manual

DSP Slices
PCIe Gen2
GTP Transceiver
Speed Grade
Temperature Grade
FPGA power supply system
Artix-7 FPGA power supplies are V
V . V is the FPGA core power supply pin, which needs to be connected
MGTAVTT CCINT
to 1.0V; V is the power supply pin of FPGA Block RAM, connect to 1.0V;
CCBRAM
V is FPGA auxiliary power supply pin, connect 1.8V; V
CCAUX
each BANK of FPGA, including BANK0, BANK13~16, BANK34~35. On
AC7A035 FPGA core board, BANK34 and BANK35 need to be connected to
DDR3, the voltage connection of BANK is 1.5V, and the voltage of other BANK
is 3.3V. The V
CCO
changed by replacing the LDO chip. V
internal GTP transceiver, connected to 1.0V; V
of the GTP transceiver, connected to 1.2V.
The Artix-7 FPGA system requires that the power-up sequence be power
by V , then V
CCINT CCBRAM
same voltage, they can be powered up at the same time. The order of power
outages is reversed. The power-up sequence of the GTP transceiver is V
then V , then V
MGTAVCC
can be powered up at the same time. The power-off sequence is just the
opposite of the power-on sequence.

Part 2.3: Active Differential Crystal

The AC7A035 core board is equipped with two Sitime active differential
crystals, one is 200MHz, the model is SiT9102-200.00MHz, the system main
clock for FPGA and used to generate DDR3 control clock; the other is 125MHz,
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ARTIX-7 FPGA Development Board AX7A035 User Manual
XADC
of BANK15 and BANK16 is powered by the LDO, and can be
, then V , and finally V
CCAUX
. If V
MGTAVTT CCINT
1 XADC, 12bit, 1Mbps AD
4 GTP, 6.6Gb/s max
Industrial
, V , V
CCINT CCBRAM
is the supply voltage of the FPGA
MGTAVCC
MGTAVTT
. If V
CCO
and V have the same voltage, they
MGTAVCC
90
1
-2
, V , V
CCAUX CCO MGTAVCC
is the voltage of
CCO
is the termination voltage
and V
CCINT CCBRAM
www.alinx.com
and
have the
,
CCINT