Part 2.4: Ddr3 Dram - Alinx AX7A035 User Manual

Part 2.4: DDR3 DRAM

The FPGA core board AC7A035 is equipped with two Micron 4Gbit
(512MB) DDR3 chips (8Gbit in totally), model is MT41J256M16HA-125
(compatible with MT41K256M16HA-125). The DDR3 SDRAM has a maximum
operating speed of 400MHz (data rate 800Mbps). The DDR3 memory system
is directly connected to the memory interface of the BANK 34 and BANK35 of
the FPGA. The specific configuration of DDR3 SDRAM is shown in Table
2-4-1.
Bit Number
U5,U6
The hardware design of DDR3 requires strict consideration of signal
integrity. We have fully considered the matching resistor/terminal resistance,
trace impedance control, and trace length control in circuit design and PCB
design to ensure high-speed and stable operation of DDR3. Figure 2-4-1
details the hardware connection of DDR3 DRAM
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ARTIX-7 FPGA Development Board AX7A035 User Manual
Chip Model
MT41J256M16HA-125
Table 2-4-1: DDR3 SDRAM Configuration
Figure 2-4-1: The DDR3 DRAM Schematic
Capacity Factory
256M x 16bit
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Micron