AMD XILINX VEK280 User Manual page 70

3/20/24, 12:51 PM
Rail Rail Name
15 LPDMGTYAVTT
16 LPDMGTYVCCAUX 1.50
17 MGTAVCC
18 MGTAVTT
19 MGTVCCAUX
20 VCCO_HDIO_3V3 3.3
21 UTIL_1V8
22 UTIL_2V5
23 UTIL_1V0
✎
Note: Bus short names are decoded as:
I2C Address – PMBUS_SDA/SCL
BUS1 - PMBUS1_INA226_SDA/SCL
BUS2 - PMBUS2_INA226_SDA/SCL
See PMC MIO[46:47] I2C0 Bus
The FMCP HSPC (J51) VADJ pins are wired to the programmable rail VADJ_FMC.
The VADJ_FMC rail is programmed to 1.50V by default. The VADJ_FMC rail also
powers the XCVE2802 FMCP interface banks 709 and 710 (see the table in
Voltage Rails). Documentation describing PMBus programming for the Infineon
power controllers is available on the
layout and power system design meet the recommended criteria described in the
Versal Adaptive SoC PCB Design User Guide (UG863).
Table: Power System – Non-PMBus Regulators
https://docs.amd.com/internal/api/webapp/print/d54fa025-f5b0-4797-be6e-41b3e31f9548
Unofficial Document
Nominal Voltage (V) Max Current (A)Device
1.20 6 U167 A, U316
0.5 U175 LDO
0.92 4 U160 D
1.20 6 U295
1.50 0.5 U160 LDO
2 U175 A
1.80 2 U354
2.50 2 U160 B
1.00 0.4 U167 LDO
for I2C diagrams and more details.
Infineon Integrated Circuits
PMBUS Addr INA226 Addr
0x4C 0x4C
BUS2
0x4D 0x4D
BUS2
0x47 0x42
BUS2
0x49 0x46
BUS2
0x47 0x48
BUS2
0x4D 0x46
BUS1
N/A
0x4F
N/A
0x47
0x4C N/A
I/O
website. The PCB
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